M616Z08 datasheet(6/14 Pages) STMICROELECTRONICS

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M616Z08

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Table 5. DC Characteristics

Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 125°C; VCC = 3.0 to 3.6V or 2.34 to 3.0V (except where noted).

2. Input leakage on TO Pin due to internal pull-down to VSS.

3. Average AC current, Outputs open, cycling at tAVAV minimum.

4. All other Inputs at VIL ≤ 0.2V or VIH ≥ VCC –0.2V.

OPERATION

READ Mode

The M616Z08 is in the READ Mode whenever

WRITE Enable (WE0 or WE1) is High with Output

Enable (OE) Low, and Chip Enable (CE) is assert-

ed. This provides access to data from sixteen of

the 131,072 locations in the static memory array,

specified by the 13 address inputs. Valid data will

be available at the sixteen output pins within tAVQV

after the last stable address, providing OE is Low

and CE is Low. If Chip Enable or Output Enable

access times are not met, data access will be

measured from the limiting parameter (tELQV or

tGLQV) rather than the address. Data out may be

indeterminate at tELQX and tGLQX, but data lines

will always be valid at tAVQV.

Figure 5. Address Controlled, READ Mode AC Waveforms

Note: CE =Low, OE = Low, WE(0,1) =High.

Sym

Parameter

Test Condition(1)

Min

Typ

Max

Unit

ILI

Input Leakage Current

≤ VIN ≤ VCC

TO Pin(2)

125

µA

All other inputs

±1

µA

ILO

Output Leakage Current

≤ VOUT ≤ VCC

±1

µA

ICC1

(3)

Supply Current

VCC =3.6V

ICC3

(4)

Supply Current (Standby)

CMOS

VCC = 3.6V,

≥ VCC – 0.2V, f = 0

1mA

VIL

Input Low Voltage

–0.3

0.3VCC

VIH

Input High Voltage

0.7VCC

VCC + 0.3

VOL

Output Low Voltage

IOL = 1mA

0.2

VOH

Output High Voltage

IOH = –1mA

2.34 to 3.0V

VCC–0.2V

3.0 to 3.6V

VCC–0.3V

tAVAV

tAVQV

tAXQX

A0-A12

DQ0-DQ15

VALID

DATA VALID

AI04210

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