M68AF127B datasheet(4/23 Pages) STMICROELECTRONICS

部件名	M68AF127B

功能描述	1Mbit 128K x8, 5V Asynchronous SRAM

PDF	23 Pages

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制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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M68AF127B

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SUMMARY DESCRIPTION

The M68AF127B is a 1Mbit (1,048,576 bit) CMOS

SRAM, organized as 131,072 words by 8 bits. The

device features fully static operation requiring no

external clocks or timing strobes, with equal ad-

dress access and cycle times. It requires a single

4.5 to 5.5V supply.

This device has an automatic power-down feature,

reducing the power consumption by over 99%

when deselected.

The M68AF127B is available in SO32, PDIP32,

TSOP32 (8x13.4mm) and TSOP32 (8x20mm)

packages.

Figure 2. Logic Diagram

Table 1. Signal Names

AI05472B

A0-A16

DQ0-DQ7

VCC

M68AF127B

VSS

A0-A16

Address Inputs

DQ0-DQ7

Data Input/Output

Chip Enable

Output Enable

Write Enable

VCC

Supply Voltage

VSS

Ground

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