M41T93_07 datasheet(34/51 Pages) STMICROELECTRONICS

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Clock operation

M41T93

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3.13

Oscillator fail detection

If the Oscillator Fail (OF) Bit is internally set to a '1,' this indicates that the oscillator has

either stopped, or was stopped for some period of time and can be used to judge the validity

of the clock and date data. This bit will be set to '1' any time the oscillator stops.

In the event the OF Bit is found to be set to '1' at any time other than the initial power-up, the

STOP Bit (ST) should be written to a '1,' then immediately reset to '0.' This will restart the

oscillator. The following conditions can cause the OF Bit to be set:

●

The first time power is applied (defaults to a '1' on power-up).

Note:

If the OF Bit cannot be written to '1' four seconds after the initial power-up, the STOP Bit

(ST) should be written to a '1,' then immediately reset to '0.'

●

The voltage present on VCC or battery is insufficient to support oscillation.

●

The ST Bit is set to '1.'

●

External interference of the crystal

For the M41T93, if the Oscillator Fail Interrupt Enable Bit (OFIE) is set to a '1,' the

IRQ/FT/OUT pin will also be activated. The IRQ/FT/OUT output is cleared by resetting the

OFIE or OF Bit to '0' (NOT by reading the Flag Register).

The OF Bit will remain set to '1' until written to logic '0.' The oscillator must start and have

run for at least 4 seconds before attempting to reset the OF Bit to '0.' If the trigger event

occurs during a power down condition, this bit will be set correctly.

3.14

Oscillator fail interrupt enable

If the Oscillator Fail Interrupt Bit (OFIE) is set to a '1,' the IRQ/FT/OUT pin will also be

activated. The IRQ/FT/OUT output is cleared by resetting the OFIE or OF Bit to '0' (not be

reading the Flags Register).

M41T93 数据表(PDF) 34 Page - STMicroelectronics