THMC45

5V AND 3.3V DC BRUSHLESS FAN MOTOR DRIVER

WITH SINGLE WIRE CONTROL

SLIS101A − MAY 2001

9

POST OFFICE BOX 655303

PRINCIPLES OF OPERATION

tachometer signaling on PWM input (PWM)

The PWM terminal of the THMC45 provides a 1-

edge of the PWM input signal after the Hall sensor amplifier changes states (see Figure 4). Note that the

THMC45 incorporates a blanking circuit that disregards transitions on the PWM terminal during the TACH

current pulses. This ensures that the TACH pulses do not corrupt the output PWM signal. This current signal

can be detected with external circuitry and can be sent to the TACH input of the hardware monitor portion of

a Super I/O device.

t(de-glitch)

td

t(PW)

t(de-glitch)

t(de-glitch)

Differential Hall

Signal (H+ − H−)

Conditioned Hall

Amplifier Output

(Internal)

PWM Input

TACH Current

Sink Pulses

TACH

Figure 4. Tachometer Current Pulse Timing on PWM Input Pin

sleep/run states using PWM input (PWM)

The THMC45 enters a low-current sleep state when the PWM input maintains a logic low level for more than

transitions from sleep state to run state on the first rising edge on the PWM input. Figure 5 shows the timing

relationships between the PWM signal and sleep/run state.

t(SLEEP)

PWM Input

OUTA, OUTB

Enable Signal

t(PWM_de-glitch)

Figure 5. PWM Input Signal, Sleep State, and Run State Timing