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WM8991 数据表(PDF) 86 Page - Wolfson Microelectronics plc |
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WM8991 数据表(HTML) 86 Page - Wolfson Microelectronics plc |
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86 / 174 page ![]() WM8991 Pre-Production w PP, May 2008, Rev 3.1 86 ALTERNATIVE DAC INTERFACE The WM8991 may be configured to select between two different audio interfaces, providing the capability to receive DAC input data via BCLK2, DACLRC2 and DACDAT2 instead of BCLK, DACLRC and DACDAT. This selection is made by register bit AIF_SEL, as described in Table 45. To use the alternative DAC interface, the following register settings are required: • AIF_TRIS = 0 • AIF_SEL = 1 • GPIO3_PU = 0, GPIO4_PU = 0, GPIO5_PU = 0 • GPIO3_PD = 0, GPIO4_PD = 0, GPIO5_PD = 0 Note that additional devices can also be connected to the main interface pins using the TDM mode. See "Digital Audio Interface" section for further details on controlling the audio interface pins. The alternative DAC interface connection is illustrated in Figure 42. DIGITAL AUDIO INTERFACE A-law and u-law support TDM Support GPIO Alternative DAC Interface Alternative MCLK Button Control / Accessory Detect Clock Output Inverted ADCLRC Processor #2 Processor #1 AIF_SEL Figure 42 Alternative DAC Interface |
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