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EM78F651NAMS/NAMJ 数据表(PDF) 35 Page - ELAN Microelectronics Corp |
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EM78F651NAMS/NAMJ 数据表(HTML) 35 Page - ELAN Microelectronics Corp |
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35 / 58 page ![]() EM78F651N 8-Bit Microcontroller Product Specification (V1.1) 10.20.2006 • 31 (This specification is subject to change without further notice) Vdd, is below the working voltage, the IC kernel must keep all register status automatically. LVD property is set at Register RE, Bit 1, 0 detailed operation mode is as follows: Bits 1~Bit 0 (LVD1~LVD0): Low Voltage Detect level control Bits. LVD1 LVD0 LVD Voltage Interrupt Level 0 0 2.1 0 1 3.1 1 0 3.8 1 1 4.3 The LVD status and interrupt flag is referred to as RF Register Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 RF LVDIF - - - - EXIF ICIF TCIF Bit 7 (LVDIF): Low voltage Detector interrupt flag. When LVD1, LVD0 = “0, 0”, Vdd > 2.3V, LVDIF is “0”, Vdd ≤ 2.3V, set LVDIF to “1”. LVDIF is reset to “0” by software. When LVD1, LVD0 = “0, 1”, Vdd > 3.3V, LVDIF is “0”, Vdd ≤ 3.3V, set LVDIF to “1”. LVDIF is reset to “0” by software. When LVD1, LVD0 = “1, 0”, Vdd > 4.0V, LVDIF is “0”, Vdd ≤ 4.0V, set LVDIF to “1”. LVDIF is reset to “0” by software. When LVD1, LVD0 = “1, 1”, Vdd > 4.5V, LVDIF is “0”, Vdd ≤ 4.5V, set LVDIF to “1”. LVDIF is reset to “0” by software. The following steps are needed to setup the LVD function: Set the LVDEN of Register RE to “1”, then use Bit 1, 0 (LVD1, LVD0) of Register RE to set LVD interrupt level Wait for LVD interrupt to occur. Clear LVD interrupt flag The internal LVD module uses internal circuit to fit. When the LVDEN is set to enable the LVD module, the current consumption will increase to about 10µA. During sleep mode, the LVD module continues to operate. If the device voltage drops slowly and crosses the detect point, the LVDIF bit will be set and the device won’t wake-up from Sleep mode. Until the other wake-up sources wake up the device, the LVD interrupt flag is still set at the prior status. When the system resets, the LVD flag will be cleared. Figure 6-9 shows the LVD module to detect the external voltage situation. When Vdd drops not below VLVD, LVDIF remain at “0”. |
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