AS7058 datasheet(59/199 Pages) AMSOSRAM

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AS7058

Functional description

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DS001077 • v2-00 • 2025-Sep-24

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7.10

Communication interfaces

7.10.1

Interrupt

The interrupt manager processes the interrupt events. These interrupt events must be

released for processing via an interrupt enable register IRQ_ENABLE. The dedicated interrupt

status bit is automatically reset when the corresponding sub-status register is read (auto-zero

interrupt events may be lost.

7.10.2

GPIO

The GPIO pin can be used as an input or output. In default configuration the GPIO pin is

configured as an input. Since the internal pull up/down resistors are disabled it is

recommended to connect an external pull up or pull down resistor to define the logic input level

of the pin. Alternatively, it is also possible to enable the internal pull up or pull down resistors

via register GPIO_PU or GPIO_PD to avoid an external resistor as part of the initialization

routine of AS7058. The logic input level can be read back via register GPIO_IN register. Once

the GPIO pin is configured as an output via GPIO_OEN register there are various internal

status signals which can be routed to the GPIO pin. The register GPIO_PINMAP_SEL in its

default configuration configures the pin as normal output pin whose output signal level can be

controlled via GPIO_OUT register. However, if the register is reconfigured it is also possible to

indicate if the LEDs are enabled or if standby mode is active. Please mind that when the GPIO

pin is configured as an output the GPIO_IN register is always set to one independent of the

actual output signal level.

7.10.3

I²C/SPI interface

The AS7058 supports I²C and SPI as host communication and control interfaces. In both

operation modes (I²C or SPI), AS7058 works as a slave device. The interface selection is

handled via the CSXN pin during startup of the device. In case AS7058 is supposed to work in

I²C operation mode it is mandatory to pull the CSXN pin high with an external pull up resistor.

In case SPI operation mode should be used the CSXN pin has to be connected to the chip

select pin of the SPI master device.

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