Mode

E

GA9

Q0 - Q7

Read (Latched Address)

Data Out

Read (Applied Address)

Data Out

Output Disable

X

X

Hi-Z

Program

Data In

Verify

Data Out

Program Inhibit

Hi-Z

Standby

X

X

X

Hi-Z

Electronic Signature

Codes

± 0.5V

Table 3. Operating Modes

Identifier

A0

Q7

Q6

Q5

Q4

Q3

Q2

Q1

Q0

Hex Data

Manufacturer’s Code

00100

00

0

20h

Device Code

10000

00

0

80h

Table 4. Electronic Signature

be used to gate data to the output pins, inde-

pendent of device selection. Assuming that the

of G, assuming that E has been low and the ad-

The M87C257 reduces the hardware interface in

multiplexed address-data bus systems. The proc-

essor multiplexed bus (AD0-AD7) may be tied to

the M87C257’s address and data pins. No sepa-

rate address latch is needed because the

M87C257 latches all address inputs when AS is

low.

Standby Mode

The M87C257 has a standby mode which reduces

the active current from 30mA to 100

µA (Address

Stable). The M87C257 is placed in the standby

mode by applying a CMOS high signal to the E

input. When in the standby mode, the outputs are

in a high impedance state, independent of the G

input.

Two Line Output Control

Because EPROMs are usually used in larger mem-

ory arrays, this product features a 2 line control

function which accommodates the use of multiple

memory connection. The two line control function

allows:

a. the lowest possible memory power dissipation,

b. complete assurance that output bus contention

will not occur.

For the most efficient use of these two control lines,

E should be decoded and used as the primary

device selecting function, while G should be made

a common connection to all devices in the array

and connected to the READ line from the system

control bus. This ensures that all deselected mem-

ory devices are in their low power standby mode

and that the output pins are only active when data

is desired from a particular memory device.

3/13

M87C257