DS-R-0019a

12

GS7LS104

Bi-directional Level Translator for

Open-drain and Push-Pull Applications

Functional Description

Architecture

The GS7LS104 architecture does not require a direction-control signal in order to control the direction of data

flow from A to B or from B to A.

One-shot

Gate Bias

One-shot

VCCA

VCCB

A

10kΩ

10kΩ

B

Figure 9

Level Shifter Architecture

Each A-port I/O has an internal 10kΩ pull up resistor to VCCA, and each B-port I/O has an internal 10kΩ pull-

up resistor to VCCB. The output one-shots detect rising edges on the A or B ports. During a rising edge, the

one-shot turns on the PMOS transistors for a short duration, which speeds up the low-to-high transition.

Input Driver Requirements

The rise (tR) and fall ( tF) timing parameters of the open drain outputs depend on the magnitude of the pull− up

resistors. In - addition, the propagation times ( tPD) , skew ( tSKEW) and maximum data rate depend on the

impedance of the device that is connected to the translator. The timing parameters listed in the data sheet

assume that the output impedance of the drivers connected to the translator is less than 50 kΩ .

Enable Input (OE)

The GS7LS104 has an Enable pin (OE) that provides tri-state operation at the I/O pins. Driving the Enable pin to

a low logic level minimizes the power consumption of the device and drives the I/ O VCCB

and I/ O VCCA

pins to a high impedance state. Normal translation operation occurs when the OE pin is equal to a logic high

signal. The OE pin is referenced to the VCCA supply and has overvoltage tolerant protection.

Pull-up or Pull-down Resistors on I/O Lines

Each A-port I/O has an internal 10kΩ pull-up resistor to VCCA, and each B-port I/O has an internal 10 kΩ pull-up

resistor to VCCB. If a smaller value of pull-up resistor is required, an external resistor must be added from the I/O to

VCCA or VCCB (in parallel with the internal 10 kΩ resistors).

Device Functional Modes

The GS7LS104 device has two functional modes, enabled and disabled. To disable the device set the OE input

low, which places all I/Os in a high impedance state. Setting the OE input high will enable the device.