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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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DAC8564 数据表(PDF) 31 Page - Texas Instruments |
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DAC8564 数据表(HTML) 31 Page - Texas Instruments |
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31 / 46 page  OPERATING EXAMPLES: DAC7565 DAC7565 www.ti.com ............................................................................................................................................... SBAS412A – FEBRUARY 2008 – REVISED MARCH 2008 For the following examples, X = don't care; value can be either '0' or '1'. Example 1: Write to Data Buffer A Through Buffer D; Load DAC A Through DAC D Simultaneously • 1st: Write to data buffer A: DB23 DB22) DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12-DB4 DB3-DB0 (LD1) (LD0) (DAC Sel 1) (DAC Sel 0) (PD0) 0 0 0 0 0 0 0 0 D11 D10 D9 D8-D0 X • 2nd: Write to data buffer B: DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12-DB4 DB3-DB0 (LD1) (LD0) (DAC Sel 1) (DAC Sel 0) (PD0) 0 0 0 0 0 0 1 0 D11 D10 D9 D8-D0 X • 3rd: Write to data buffer C: DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12-DB4 DB3-DB0 (LD1) (LD0) (DAC Sel 1) (DAC Sel 0) (PD0) 0 0 0 0 0 1 0 0 D11 D10 D9 D8-D0 X • 4th: Write to data buffer D and simultaneously update all DACs: DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12-DB4 DB3-DB0 (LD1) (LD0) (DAC Sel 1) (DAC Sel 0) (PD0) 0 0 1 0 0 1 1 0 D11 D10 D9 D8-D0 X The DAC A, DAC B, DAC C, and DAC D analog outputs simultaneously settle to the specified values upon completion of the 4th write sequence. (The DAC voltages update simultaneously after the 24th SCLK falling edge of the fourth write cycle). Example 2: Load New Data to DAC A Through DAC D Sequentially • 1st: Write to data buffer A and load DAC A: DAC A output settles to specified value upon completion: DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12-DB4 DB3-DB0 (LD1) (LD0) (DAC Sel 1) (DAC Sel 0) (PD0) 0 0 0 1 0 0 0 0 D11 D10 D9 D8-D0 X • 2nd: Write to data buffer B and load DAC B: DAC B output settles to specified value upon completion: DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12-DB4 DB3-DB0 (LD1) (LD0) (DAC Sel 1) (DAC Sel 0) (PD0) 0 0 0 1 0 0 1 0 D11 D10 D9 D8-D0 X • 3rd: Write to data buffer C and load DAC C: DAC C output settles to specified value upon completion: DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12-DB4 DB3-DB0 (LD1) (LD0) (DAC Sel 1) (DAC Sel 0) (PD0) 0 0 0 1 0 1 0 0 D11 D10 D9 D8-D0 X • 4th: Write to data buffer D and load DAC D: DAC D output settles to specified value upon completion: DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12-DB4 DB3-DB0 (LD1) (LD0) (DAC Sel 1) (DAC Sel 0) (PD0) 0 0 0 1 0 1 1 0 D11 D10 D9 D8-D0 X After completion of each write cycle, DAC analog output settles to the voltage specified. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 31 Product Folder Link(s): DAC7565 |
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