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RZ/T2M 数据表(PDF) 119 Page - Renesas Technology Corp

部件名 RZ/T2M
功能描述  RZ Arm-based High-end 32 & 64-bit MPUs
PDF  128 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

RZ/T2M 数据表(HTML) 119 Page - Renesas Technology Corp

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Table 2.47
Debug interface timing
Parameter
Symbol
Min.
Max.
Unit
Reference
figure
TCK cycle time
With an ICE connected
tTCKcyc
30*1
—
ns
Figure 2.96
For use in BSCAN
80
—
TCK high pulse width
tTCKH
0.4
0.6
tTCKcyc
TCK low pulse width
tTCKL
0.4
0.6
tTCKcyc
TDI setup time
tTDIS
5
—
ns
Figure 2.97
Output load:
30 pF
TDI hold time
tTDIH
5
—
ns
TMS/SWDIO setup time
tTMSS
5
—
ns
TMS/SWDIO hold time
tTMSH
5
—
ns
SWDIO delay time
tSWDO
—
15
ns
TDO delay time
With an ICE connected
tTDOD
—
15
ns
For use in BSCAN
—
22
Capture register setup time
tCAPTS
5
—
ns
Figure 2.98
Capture register hold time
tCAPTH
5
—
ns
Update register delay time
tUPDATED
—
15
ns
Trace clock cycle
tTCYC
20
—
ns
Figure 2.99
Output load:
15 pF
Trace data delay
time
Trace clock: P18_6
tTDT
-2.3
3.3
ns
Trace clock: P17_4
-2.5
3.0
Trace clock: P22_2
-1.0
4.2
Note 1. This value is the minimum cycle time for the normal operation of internal circuits.
The actual cycle time should be determined in consideration of the TCK capture edge timing and cable length of the connected ICE.
tTCKcyc
tTCKH
tTCKL
TCK
VIH
VIH
VIL
VIL
1/2 VCC33
1/2 VCC33
VIH
Figure 2.96
TCK input timing
RZ/T2M Datasheet
2. Electrical Characteristics
R01DS0383EJ0130 Rev.1.30
Mar 13, 2026
Page 119 of 128



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