HT46R46 datasheet(3/77 Pages) HOLTEK

3 / 77 page

Pin Assignment

Pin Description

HT46R46, HT46R47

Pin Name I/O Configuration

Option

Description

PA0~PA2

PA3/PFD

PA4/TMR

PA5/INT

PA6~PA7

I/O

Pull-high

Wake-up

PA3 or PFD

Bidirectional 8-bit input/output port. Each individual pin on this port can be config-

ured as a wake-up input by a configuration option. Software instructions determine

if the pin is a CMOS output or Schmitt Trigger input. Configuration options deter-

mine which pins on the port have pull-high resistors. Pins PA3, PA4 and PA5 are

pin-shared with PFD, TMR and INT, respectively.

PB0/AN0

PB1/AN1

PB2/AN2

PB3/AN3

I/O

Pull-high

Bidirectional 4-bit input/output port. Software instructions determine if the pin is a

CMOS output or Schmitt Trigger input. Configuration options determine which pins

on the port have pull-high resistors. PB is pin-shared with the A/D input pins. The

A/D inputs are selected via software instructions. Once selected as an A/D input,

the I/O function and pull-high resistor options are disabled automatically.

PD0/PWM I/O

Pull-high

PD0 or PWM

Bidirectional 1-bit input/output port. Software instructions determine if the pin is a

CMOS output or Schmitt Trigger input.

A configuration option determines if this pin has a pull-high resistor. The PWM out-

put is pin-shared with pin PD0 selected via a configuration option.

OSC1

OSC2

Crystal

or RC

OSC1, OSC2 are connected to an external RC network or external crystal, deter-

mined by configuration option, for the internal system clock. If the RC system clock op-

tion is selected, pin OSC2 can be used to measure the system clock at 1/4 frequency.

RES

Schmitt Trigger reset input. Active low.

VDD

¾¾

Positive power supply

VSS

¾¾

Negative power supply, ground

Note:

1. Each pin on PA can be programmed through a configuration option to have a wake-up function.

2. Individual pins can be selected to have a pull-high resistor.

3. Pins PB2/AN2~PB3/AN3 exist but are not bonded out on the 16-pin package.

4. unbonded pins should be setup as outputs or as inputs with pull-high resistors to conserve power.

HT46R46/C46/R47/C47/R48A/C48A/R49

Rev. 1.30

June 5, 2008

H T 4 6 R 4 6 / H T 4 6 C 4 6

H T 4 6 R 4 7 / H T 4 6 C 4 7

2 0 S S O P - A

P A 4 / T M R

P A 5 / I N T

P A 6

P A 7

O S C 2

O S C 1

V D D

R E S

P D 0 / P W M

N C

2 0

1 9

1 8

1 7

1 6

1 5

1 4

1 3

1 2

1 1

1 0

P A 3 / P F D

P A 2

P A 1

P A 0

P B 3 / A N 3

N C

P B 2 / A N 2

P B 1 / A N 1

P B 0 / A N 0

V S S

H T 4 6 R 4 6 / H T 4 6 C 4 6

H T 4 6 R 4 7 / H T 4 6 C 4 7

1 8 D I P - A / S O P - A

P A 4 / T M R

P A 5 / I N T

P A 6

P A 7

O S C 2

O S C 1

V D D

R E S

P D 0 / P W M

P A 3 / P F D

P A 2

P A 1

P A 0

P B 3 / A N 3

P B 2 / A N 2

P B 1 / A N 1

P B 0 / A N 0

V S S

1 8

1 7

1 6

1 5

1 4

1 3

1 2

1 1

1 0

H T 4 6 R 4 8 A / H T 4 6 C 4 8 A

2 0 D I P - A / S O P - A

P B 5

P A 4 / T M R

P A 5 / I N T

P A 6

P A 7

O S C 2

O S C 1

V D D

R E S

P D 0 / P W M

2 0

1 9

1 8

1 7

1 6

1 5

1 4

1 3

1 2

1 1

1 0

P B 4

P A 3 / P F D

P A 2

P A 1

P A 0

P B 3 / A N 3

P B 2 / A N 2

P B 1 / A N 1

P B 0 / A N 0

V S S

H T 4 6 R 4 8 A / H T 4 6 C 4 8 A

2 4 S K D I P - A / S O P - A / S S O P - A

P B 5

P B 4

P A 3 / P F D

P A 2

P A 1

P A 0

P B 3 / A N 3

P B 2 / A N 2

P B 1 / A N 1

P B 0 / A N 0

V S S

P C 0

P B 6

P B 7

P A 4 / T M R

P A 5 / I N T

P A 6

P A 7

O S C 2

O S C 1

V D D

R E S

P D 0 / P W M

P C 1

2 4

2 3

2 2

2 1

2 0

1 9

1 8

1 7

1 6

1 5

1 4

1 3

1 0

1 1

1 2

H T 4 6 R 4 9

2 8 S K D I P - A / S O P - A

P B 6

P B 7

P A 4 / T M R

P A 5 / I N T

P A 6

P A 7

O S C 2

O S C 1

V D D

R E S

P D 1 / P W M 1

P D 0 / P W M 0

P C 4

P C 3

2 8

2 7

2 6

2 5

2 4

2 3

2 2

2 1

2 0

1 9

1 8

1 7

1 6

1 5

1 0

1 1

1 2

1 3

1 4

P B 5

P B 4

P A 3 / P F D

P A 2

P A 1

P A 0

P B 3 / A N 3

P B 2 / A N 2

P B 1 / A N 1

P B 0 / A N 0

V S S

P C 0

P C 1

P C 2

P B 5

P B 4

P A 3 / P F D

P A 2

P A 1

P A 0

P B 3 / A N 3

P B 2 / A N 2

P B 1 / A N 1

P B 0 / A N 0

V S S

P C 0

P B 6

P B 7

P A 4 / T M R

P A 5 / I N T

P A 6

P A 7

O S C 2

O S C 1

V D D

R E S

P D 1 / P W M 1

P D 0 / P W M 0

2 4

2 3

2 2

2 1

2 0

1 9

1 8

1 7

1 6

1 5

1 4

1 3

1 0

1 1

1 2

H T 4 6 R 4 9

2 4 S K D I P - B / S O P - B

H T 4 6 R 4 6 / H T 4 6 C 4 6

H T 4 6 R 4 7 / H T 4 6 C 4 7

1 6 N S O P - A

P A 4 / T M R

P A 5 / I N T

P A 6

P A 7

O S C 2

O S C 1

V D D

R E S

P A 3 / P F D

P A 2

P A 1

P A 0

P B 1 / A N 1

P B 0 / A N 0

V S S

1 6

1 5

1 4

1 3

1 2

1 1

1 0

P D 0 / P W M

H T 4 6 R 4 9

2 0 D I P - A / S O P - A

P A 4 / T M R

P A 5 / I N T

P A 6

P A 7

O S C 2

O S C 1

V D D

R E S

P D 1 / P W M 1

P D 0 / P W M 0

2 0

1 9

1 8

1 7

1 6

1 5

1 4

1 3

1 2

1 1

1 0

P A 3 / P F D

P A 2

P A 1

P A 0

P B 3 / A N 3

P B 2 / A N 2

P B 1 / A N 1

P B 0 / A N 0

V S S

P C 0

HT46R46 数据表(PDF) 3 Page - Holtek Semiconductor Inc

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