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STA323WQS 数据表(PDF) 21 Page - STMicroelectronics |
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STA323WQS 数据表(HTML) 21 Page - STMicroelectronics |
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21 / 78 page ![]() STA323WQS Electrical specifications 21/78 Figure 12. Test circuit 2 4.5 Power supply and control sequencing Figure 13 shows the recommended power-up and power-down sequencing. The "time zero" reference point is taken where VCC crosses the under voltage lockout threshold. Figure 13. Recommended power up and power down sequence High Current Dead time for Bridge application = ABS(DTout(A)-DTin(A))+ABS(DTOUT(B)-DTin(B)) +VCC Rload=4 Ω Q2 OUTB DTout(B) DTin(B) DTout(A) C71 470nF C70 470nF C69 470nF Iout=1.5A Iout=1.5A Q4 Q1 Q3 M64 INB M63 D06AU1651 M58 INA M57 DTin(A) Duty cycle=A Duty cycle=B Duty cycle A and B: Fixed to have DC output current of 4A in the direction shown in figure L68 10 µ L67 10 µ OUTA |
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