Data Sheet

AD5273

Rev. J | Page 17 of 20

4. When all data bits have been read or written, a stop con-

dition is established by the master. A stop condition is

defined as a low-to-high transition on the SDA line

while SCL is high. In write mode, the master pulls the

SDA line high during the 10th clock pulse to establish a

stop condition, as shown in Figure 39 and Figure 40. In

read mode, the master issues a no acknowledge for the

ninth clock pulse, that is, the SDA line remains high. The

master then brings the SDA line low before the 10th clock

pulse, which goes high to establish a stop condition, as

shown in Figure 41.

A repeated write function gives the user flexibility to

update the RDAC output continuously, except after

permanent programming, when the part is addressed and

receives instructions only once. During the write cycle,

each data byte updates the RDAC output. For example,

after the RDAC has acknowledged its slave address and

instruction bytes, the RDAC output updates after these two

bytes. If another byte is written to the RDAC while it is still

addressed to a specific slave device with the same instruc-

tion, this byte updates the output of the selected slave device.

If different instructions are needed, the write mode must

be started again with a new slave address, instruction, and

data bytes. Similarly, a repeated read function of the RDAC

is also allowed.

CONTROLLING TWO DEVICES ON ONE BUS

Figure 42 shows two AD5273 devices on the same serial bus.

Each has a different slave address because the state of each AD0

pin is different. This allows each device to operate independently.

The master device output bus line drivers are open-drain pull-

down in a fully I2C-compatible interface.

Figure 42. Two AD5273 Devices on One Bus

MASTER

SDA SCL

AD0

AD5273

SDA SCL

AD0

AD5273

SDA

SCL

5V

RP

RP

5V