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74LVC374AD 数据表(PDF) 4 Page - Nexperia B.V. All rights reserved |
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74LVC374AD 数据表(HTML) 4 Page - Nexperia B.V. All rights reserved |
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4 / 19 page ![]() © Nexperia B.V. 2017. All rights reserved 74LVC374A All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 3 — 6 December 2012 4 of 19 Nexperia 74LVC374A Octal D-type flip-flop; 5 V tolerant inputs/outputs; positive-edge trigger; 3-state 5. Pinning information 5.1 Pinning 5.2 Pin description (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig 5. Pin configuration for SO20 and (T)SSOP20 Fig 6. Pin configuration for DHVQFN20 374 OE VCC Q0 Q7 D0 D7 D1 D6 Q1 Q6 Q2 Q5 D2 D5 D3 D4 Q3 Q4 GND CP 001aad040 1 2 3 4 5 6 7 8 9 10 12 11 14 13 16 15 18 17 20 19 001aad088 374 GND(1) Transparent top view Q4 D3 Q3 D4 D2 D5 Q2 Q5 Q1 Q6 D1 D6 D0 D7 Q0 Q7 9 12 8 13 7 14 6 15 5 16 4 17 3 18 2 19 terminal 1 index area Table 2. Pin description Symbol Pin Description 1OE output enable input (active LOW) Q[0:7] 2, 5, 6, 9, 12, 15, 16, 19 3-state flip-flop output D[0:7] 3, 4, 7, 8, 13, 14, 17, 18 data input 10 GND ground (0 V) 11 CP clock input (LOW-to-HIGH, edge-triggered) 20 VCC supply voltage |
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