NRF7002-QFAA-R7 datasheet(20/61 Pages) NORDIC

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Quad Serial Peripheral Interface

The same nonce and key must be used for both encryption and decryption of the same memory address.

Stream ciphers are symmetric. They do not differentiate between encrypting or decrypting, reading or

writing.

Stream Cipher

NONCE[95:0]

ADDR[31:4]

ZEROS[3:0]

AES 128

AES[127:96]

AES[95:64]

AES[63:32]

AES[31:0]

ENC.KEY[127:0]

ENC.NONCE[95:0]

ENC.ENABLE

ADDRESS IN[31:0]

DATA IN[31:0]

DATA OUT[31:0]

Figure 12: Stream cipher

Stream cipher

Value

ENC.KEY [127:0]

{CIPHER_KEY3[31:0], CIPHER_KEY2[31:0], CIPHER_KEY1[31:0],

CIPHER_KEY0[31:0]}

ENC.NONCE [95:0]

{NONCE_CNT[31:0], NONCE_CFG[31:0], CIPHER_NONCE0[31:0]}

ADRESS IN [31:0]

{8’h00, SPI Address [23:0]}

ENC.ENABLE

CIPHER ENABLE

Notes:

• CIPHER_KEY3, CIPHER_KEY2, CIPHER_KEY1, CIPHER_KEY0, CIPHER_NONCE0 : IP parameters (32 bit).

• NONCE_CFG : The NONCE Configuration register. Initialized with the CIPHER_INIT command.

• NONCE_CNT: The NONCE Counter register. Initialized to d0 with the CIPHER_INIT command. A pre-

increment is done to the NONCE_CNT register at the start of the QSPI transaction (FAST_READ,

READ4, PP, PP4).

• Single read/write mode : increment always.

• Multiple read/write mode : increment only if the received SPI address differs from the next

expected SPI address (last SPI address +1) or if the last transaction was not in multiple mode.

• CIPHER ENABLE : The Cipher Enable register is 1’b0 by default and it is set to 1’b1 with the

CIPHER_INIT command.

Table 4: Stream cipher configuration

7.3 QSPI throughput

The table below details the expected peak achievable UDP/TCP throughput numbers for a QSPI/SPI master

clock rate of 24 MHz, and where the networking stack executing on the host is not a limiting factor. These

numbers are projected using measured raw QSPI/SPI master packet transmission rates.

4486_184 v1.0

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