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ST10F269Z2Q3 数据表(PDF) 103 Page - STMicroelectronics |
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ST10F269Z2Q3 数据表(HTML) 103 Page - STMicroelectronics |
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103 / 161 page  ST10F269Z2Qx 103/161 16.1.5 - RTCAH & RTCAL: RTC ALARM Registers When the programmable counters reach the 32-bit value stored into RTCAH & RTCAL registers, an alarm is triggered and the interrupt request RTAIR is generated. Those registers are not protected. RTCAL (EC12h) XBUS Reset Value: XXXXh RTCAH (EC14h) XBUS Reset Value: XXXXh Note: Those registers are not reset 16.2 - Programming the RTC RTC interrupt request signals are connected to Port2, pad 10 (RTCSI) and pad 11 (RTCAI). An alternate function Port2 is to generate fast interrupts firq[7:0]. To trigger firq[2] and firq[3] the following configuration has to be set. EXICON ESFR controls the external interrupt edge selection, RTC interrupt requests are rising edge active. EXICON (F1C0h) ESFR Reset Value: 0000h Notes: 1. EXI2ES and EXI3ES must be configured as "01b" because RCT interrupt request lines are rising edge active. 2. Alarm interrupt request line (RTCAI) is linked with EXI3ES. 3. Timed interrupt request line (RTCSI) is linked with EXI2ES. EXISEL ESFR enables the Port2 alternate sources. RTC interrupts are alternate sources 2 and 3. EXISEL (F1DAh) ESFR Reset Value: 0000h Notes: 1. Advised configuration. 2. Alarm interrupt request (RTCAI) is linked with EXI3SS. 3. Timed interrupt request (RTCSI) is linked with EXI2SS. 15 14 13 12 11 10 987654 3210 RTCAL RW 15 14 13 12 11 10 987654 3210 RTCAH RW 15 14 13 12 11 10 987654 3210 EXI7ES EXI6ES EXI5ES EXI4ES EXI3ES 1 2 EXI2ES 1 3 EXI1ES EXI0ES RW RW RW RW RW RW RW RW 15 14 13 12 11 10 987654 3210 EXI7SS EXI6SS EXI5SS EXI4SS EXI3SS 2 EXI2SS 3 EXI1SS EXI0SS RW RW RW RW RW RW RW RW EXIxSS External Interrupt x Source Selection (x=7...0) ‘00’: Input from associated Port 2 pin. ‘01’: Input from “alternate source”. 1 ‘10’: Input from Port 2 pin ORed with “alternate source”. 1 ‘11’: Input from Port 2 pin ANDed with “alternate source”. |
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