ST10F269Z2Q3 datasheet(57/161 Pages) STMICROELECTRONICS

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ST10F269Z2Qx

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12.2 - I/O’s Special Features

12.2.1 - Open Drain Mode

Some of the I/O ports of ST10F269Z2Qx support

the open drain capability. This programmable

feature may be used with an external pull-up

resistor, in order to get an AND wired logical

function.

This feature is implemented for ports P2, P3, P4,

P6, P7 and P8 (see respective sections), and is

controlled through the respective Open Drain

Control Registers ODPx. These registers allow

the individual bit-wise selection of the open drain

mode for each port line. If the respective control

bit ODPx.y is ‘0’ (default after reset), the output

driver is in the push-pull mode. If ODPx.y is ‘1’, the

open drain configuration is selected. Note that all

ODPx registers are located in the ESFR space

(See Figure 19).

12.2.2 - Input Threshold Control

The standard inputs of the ST10F269Z2Qx

determine the status of input signals according to

TTL levels. In order to accept and recognize noisy

signals, CMOS-like input thresholds can be

selected instead of the standard TTL thresholds

for all pins of Port 2, Port 3, Port 4, Port 7 and Port

8. These special thresholds are defined above the

TTL thresholds and feature a defined hysteresis

to prevent the inputs from toggling while the

respective

input

signal

level

near

the

thresholds.

The Port Input Control register PICON is used to

select these thresholds for each Byte of the

indicated ports, this means the 8-bit ports P4, P7

and P8 are controlled by one bit each while ports

P2 and P3 are controlled by two bits each.

All options for individual direction and output mode

control are available for each pin, independent of

the selected input threshold. The input hysteresis

provides stable inputs from noisy or slowly

changing external signals (See Figure 20).

PICON (F1C4h / E2h)

ESFR

Reset Value: --00h

987654

3210

--------

P8LIN P7LIN

P4LIN P3HIN P3LIN P2HIN P2LIN

Bit

Function

PxLIN

Port x Low Byte Input Level Selection

Pins Px.7...Px.0 switch on standard TTL input levels

Pins Px.7...Px.0 switch on special threshold input levels

PxHIN

Port x High Byte Input Level Selection

Pins Px.15...Px.8 switch on standard TTL input levels

Pins Px.15...Px.8 switch on special threshold input levels

Figure 19 : Output Drivers in Push-pull Mode and in Open Drain Mode

Push-Pull Output Driver

Open Drain Output Driver

External

Pullup

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