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BD.05/9803V1

AI01032

RST

VCC

ST1305

GND

I/O

CLK

Figure 1. Delivery Forms

ST1305

High Endurance CMOS 192 bit EEPROM

With Secure Logic Access Control

BRIEF DATA

s

Single 5 V Supply Voltage

s

Programming Time: 5 ms

s

Memory Divided Into:

– 16 bits of Circuit Identification

– 48 bits of Card Identification

– 48 bits of Count Data

– 16 bits of Certificate

– 48 bits of Transport Code

– 64 bits of Issuer Data

s

Counting Capability up to 262,144 Units

s

Circuit Protected by Transport Code for Delivery

from ST to the Customer

s

5 External Contacts Only (ISO 7816 Compatible)

s

Answer to Reset (Fully Compatible with ISO 7816-3)

s

E.S.D. Protection Greater Than 4000 V

s

s

10 Years Data Retention

s

1 Million Erase/Write Cycles Endurance

DESCRIPTION

The ST1305 is a 192-bit EEPROM device with associat-

ed security logic to control memory access. The circuit

includes counting capabilities and thus is very well

adapted to prepaid card applications.

The ST1305 is protected by hard-wired security logic

and special fuses. The memory is arranged as a matrix

of 24x8 cells, accessed in a serial bit-wise fashion for

reading and programming, and in a byte-wise fashion

for internal erasing.

The device recognises three commands issued via the

RST and CLK pins (as described in the full data sheet):

– RESET: to reset the internal address register to 00d

– READ: to increment the internal address register,

and read the data bit at that address

– PROG: to program the bit at the current address.

Figure 2. Pin Connection

Table 1. Signal Names

CLK

Clock

RST

Reset

I/O

Serial Data Input/Output

Supply Voltage

GND

Ground

Micromodule

Wafer