ST1331, ST1333, ST1353

2/3

Figure 2. Memory Map

Note: 1. The write-only RAM area (RN) is applicable only for the User Configuration.

AI03384

Anti-Tearing Flags

User-Defined Area

Signature

Fuses

Unused

Reserved Area

(RA)

Reserved Area (RA)

Certificate (CER)

Data Area (CD)

(Counters and

Transport Code)

Issuer-Defined Area

(ST1331)

Authentication

Secret Key (SK)

(ST1333, ST1353)

Card Identification

Area (ID)

Circuit

Identification Area

0

16

64

104

112

128

192

256

260

264

288

320

376

56 bits

4 bits

4 bits

24 bits

32 bits

64 bits

16 bits

8 bits

40 bits

48 bits

16 masked bits

RAM1 (Write-Only)

(RN)

(ST1333, ST1353)

0

32

32 bits

a byte-wise fashion for internal erasing. An on-chip

address counter provides an internal address

space of up to 512 bits.

Each member of the ST1331/1333/1353 family

has an identification data area, unit-counters (with

an anti-tearing mechanism for reliable usage in

open readers), a post validation certificate, an

issuer area (ST1331) or an authentication secret

key area (ST1333/1353), and a user area. This is

summarized in Figure 2.

The validation certificate allows the recognition of

the device by the appropriate security module.

The anti-tearing mechanism guards against extra,

spurious count signals being executed when the