ST16ST2G

2/2

DESCRIPTION

The ST16ST2G, a member of the standard

ST16SF4x device family, is a serial access micro-

controller especially designed for high volume and

cost competitive Smartcard applications where

firmware security algorithm must be implemented.

The ST16ST2G is based on 8 bit CPU core and in-

cludes on chip memories: 384 Bytes of RAM, 15 K

Bytes of USER ROM, 1.5 K Byte of SYSTEM

ROM, and up to 16352 Bytes of EEPROM. The

tication Library.

Both ROM and EEPROM memories can be config-

ured into two sectors. Access rules from any mem-

ory section or sector to any other are set-up by the

User’s defined Memory Access Control Matrix

(MACM).

Reliability data related to the ST16ST2G product

manufactured using STMicroelectronics advanced

CMOS EEPROM technology confirm data reten-

tion up to 10 years and endurance up to 100,000

Erase/Write cycles.

As with all other ST16 family members, the

ST16ST2G is fully compatible with the ISO stand-

ards for Smartcard applications.

Software development (ROM code, options) can

be completed by the ST16-19HDSE development

system.

The ST16ST2G can be delivered either in unsawn

or sawn wafers, 180 or 275 micron thickness as

well as in micromodule package.

For ordering information and request for quotation

(RTQ) please contact your nearest ST sales office.

Figure 1. Block Diagram

SCP 102b/DS

MEMORY ACCESS CONTROL MATRIX

CPU

BYTES

SERIAL I/0's

INTERFACE

NUMBER

GENERATOR

INTERNAL BUS

RAM

SECT.

A

SECT.

B

SECTOR

A

SECTOR

B

SECTORS

COMBIN.

ROM

V

GENERATION

EEPROM

SECTORS COMBINATIVE

RST

GND

V

I/O1

CLK

SYSTEM

ROM

SECT.

S

SECURITY

LOGIC

I/O2

PP

CC

8 BIT

384

1.5 K

BYTE

15 K BYTES

Up to 16352 BYTES