ST19CF68

2/2

HARDWARE DESCRIPTION

The ST19CF68, a member of the ST19 device

family, is a serial access microcontroller especially

designed for very large volume and cost competi-

tive secure portable objects, where high perform-

ance Public Key Algorithms will be implemented,

to cut down initialization and communication costs

and to increase security.

Its internal Modular Arithmetic Processor is de-

signed to speed up cryptographic calculations us-

ing Public Key Algorithms. Based on a 512 bit

architecture, it processes modular multiplication

and squaring up to 1024 bit operands.

The ST19CF68 is based on a STMicroelectronics

8 bit CPU core including on-chip memories: 960

Bytes of RAM, 23 KBytes of USER ROM and 8

KBytes of EEPROM.

RAM, ROM and EEPROM memories can be con-

figured into partitions. Access rules from any

memory partition to another partition are setup by

the user defined Memory Access Control Logic.

It is manufactured using the highly reliable ST

CMOS EEPROM technology.

As all other ST19 family members, it is fully com-

patible with the ISO standards for Smartcard appli-

cations.

SOFTWARE SUPPORT

SOFTWARE DEVELOPMENT

Software development and firmware (ROM code/

options) generation are completed by the ST16-19

HDS development system.

CRYPTO LIBRARIES

For an easy and efficient use of the Modular Arith-

metic Processor (MAP), ST proposes a complete

set of firmware subroutines. This library is located

in a specific ROM area, leaving 23 KBytes in the

User ROM for the application software. This li-

brary saves the operating system designer from

coding first layer functions and allows the designer

to concentrate on algorithms and Public Key Cryp-

tographic (PKC) protocol implementation.

This library contains firmware functions for:

– loading and unloading parameters and results

to or from the MAP

– calculating Montgomery constants

– basic mathematics including modular squaring

and multiplication for various lengths

– modular exponentiation using or not the Chi-

nese Remainder Theorem (CRT),

– more elaborate functions such as RSA signa-

tures and authentications for any modulo length

up to 1024 bits long or DSA signature and veri-

fication.

– full internal key generation for signatures/au-

thentications. This guarantees that the secret

key will never be known outside the chip and

contributes to overall system security.

– long random number generation

– sha-1

Figure 1. Block Diagram

SCP 133b/DS

INTERNAL BUS

RAM

Bytes

USER

ROM

Bytes

EEPROM

Bytes

MAP

SERIAL

I/O

INTER-

FACE

8 BIT

CPU

8 BIT

TIMER

CLOCK

GENERA-

TOR

MODULE

UNPRE-

DICTABLE

NUMBER

GENERATOR

SECURITY

SYSTEM ROM

AND

MAP FIREWALL

MEMORY ACCESS FIREWALL

CLK

SYSTEM ROM

AND

CRYPTO

LIBRARIES

RESET

VCC

I/O

GND

ADMINISTRATOR

a

a

960

8 K

23 K

512 Bit s