ST19SF32

2/2

HARDWARE DESCRIPTION

The ST19SF32, a member of the ST19 device

family, is a serial access microcontroller especially

designed for very large volume and cost competi-

tive secure portable objects.

The ST19SF32 is based on a STMicroelectronics

8 bit CPU core including on-chip memories: 960

Bytes of RAM, 32 KBytes of USER ROM and 32 K

Bytes of EEPROM.

RAM, ROM and EEPROM memories can be con-

figured into partitions. Access rules from any

memory partition to another partition are setup by

the user defined Memory Access Control Logic.

It is manufactured using the highly reliable ST sub-

micron technology.

As all other ST19 family members, it is fully com-

patible with the ISO standards for Smartcard appli-

cations.

SOFTWARE DEVELOPMENT

Software development and firmware (ROM code/

options) generation are completed by the ST16-19

HDS development system.

Figure 1. Block Diagram

SCP 101b/DS

INTERNAL BUS

RESET

SERIAL

I/O

INTER-

FACE

8 BIT

CPU

8 BIT

TIMER

CLOCK

GENERA-

TOR

MODULE

UNPRE-

DICTABLE

NUMBER

GENERATOR

RAM

EEPROM

USER

ROM

SYSTEM ROM

FIREWALL

MEMORY ACCESS FIREWALL

CLK

I/O

GND

Vcc

SYSTEM ROM

SECURITY

ADMINISTRATOR

960

Bytes

32 K

Bytes

32 K

Bytes