ST20-C1 datasheet(38/205 Pages) STMICROELECTRONICS

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4.4 Arithmetic

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Saturated arithmetic is achieved on the ST20-C1 by evaluating an expression and

then performing the

saturate instruction. If an overflow or underflow has occurred then

the corresponding status bit will have been set, which will cause saturate to change

the value in Areg to the most positive or most negative value respectively.

saturate

clears the overflow and underflow bits.

For example, to perform a saturated multiply of

a and b:

ld a; ld b;

mul; saturate;

4.4.4

Unary minus

The expression

(-e) can be evaluated with overflow signalling by:

e; not; adc 1;

ldc 0; e; sub;

The first sequence , using

not, requires one less stack register than the second. not is

a bitwise inversion which is described in section 4.8.

4.4.5

Long arithmetic

The long arithmetic instructions are listed in Table 4.6.

Multiple length addition and subtraction

Multiple length addition or subtraction are performed using

addc and subc, executed

once for each word of the result. For both instructions, the carry (or borrow) is held in

the carry bit of the status register. This keeps the carrying separate from overflow, so

address calculations may be safely performed using

add, sub and wsub without

affecting the carry.

The

addc instruction forms (Breg + Areg)+ Statuscarry leaving the least significant

word of the result in Areg and the most significant (carr y) bit in the carry bit of the

status register. The Areg is rotated into the Creg.

Similarly, the

subc instruction forms (Breg - Areg)- Statuscarry leaving the least

significant word of the result in Areg and the borrow bit in the carry bit of the status

Addition of two double length unsigned values,

X and Y, giving Z, without overflow

signalling can therefore be compiled as follows

Mnemonic

Name

addc

add with carry

subc

subtract with carry

umac

unsigned multiply accumulate

Table 4.6 Long arithmetic instructions

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