EM620FV8B Series

Low Power, 256Kx8 SRAM

2

FEATURES

- Process Technology : 0.15

µm Full CMOS

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Organization :256K x8

-

Power Supply Voltage

=> EM620FV8B : 2.7~3.6V

-

Low Data Retention Voltage : 1.5V

-

Three state output and TTL Compatible

-

Packaged product designed for 45/55/70ns

GENERAL PHYSICAL SPECIFICATIONS

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Backside die surface of polished bare silicon

-

Typical Die Thickness = 725um +/-15um

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Typical top-level metallization :

=> Metal (Ti/AlCu/TiN/ARC SiON/SiO2) : 5.2K Angstroms

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Topside Passivation :

=> Passivation (HDP/pNIT/PIQ) : 5.4K Angstroms

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Wafer diameter : 8 inch

OPTIONS

- C1/W1 : DC Probed Die/Wafer @ Hot Temp

- C2/W2 : DC/AC Probed Die/Wafer @ Hot Temp

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56

EM620FV8B (Dual C/S)

256K x8 Bit Low Power and Low Voltage CMOS Static RAM

BONDING INSTRUCTIONS

The 2M full CMOS SRAM die has total 56pads. Refer to the bond pad location and identification table for X, Y coordinates.

EMLSI recommends using a bond wire on back side of die onto Vss bond pad for improved noise immunity.

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1

x

y

EMLSI LOGO

I/O Circuit

Column Select

Data

Cont

Pre-charge Circuit

Memory Array

1024 x 2048

WE

OE

CS1

I/O0 ~ I/O7

Control Logic

CS2

PAD DESCRIPTIONS

Name

Function

Name

Function

CS1,CS2

Chip select inputs

Vcc

Power Supply

OE

Output Enable input

Vss

Ground

WE

Write Enable input

NC

No Connection

A0~A17

Address Inputs

I/O0~I/O7

Data Inputs/Outputs