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ST5088 数据表(PDF) 25 Page - STMicroelectronics

部件名 ST5088
功能描述  PROGRAMMABLE AUDIO FRONT END FOR DIGITAL PHONES AND ISDN TERMINALS
PDF  33 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST5088 数据表(HTML) 25 Page - STMicroelectronics

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SERIAL CONTROL PORT TIMING (Usual COMBO I / II mode only)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
fCCLK
Frequency of CCLK
2.048
MHz
tWCH
Period of CCLK high
Measured from VIH to VIH
160
ns
tWCL
Period of CCLK low
Measured from VIL to VIL
160
ns
tRC
Rise Time of CCLK
Measured from VIL to VIH
50
ns
tFC
Fall Time of CCLK
Measured from VIH to VIL
50
ns
tHCS
Hold Time, CCLK high to CS–
low
10
ns
tSSC
Setup Time, CS– low to CCLK
high
50
ns
tSDC
Setup Time, CI valid to CCLK
high
50
ns
tHCD
Hold Time, CCLK high to CI
invalid
50
ns
tDCD
Delay Time, CCLK low to CO
data valid
Load = 100 pF ,
plus 1 LSTTL load
80
ns
tDSD
Delay Time, CS–low to CO data
valid
50
ns
tDDZ
Delay Time CS–high or 8th
CCLK low to CO high
impedance whichever comes
first
15
80
ns
tHSC
Hold Time, 8th CCLK high to
CS– high
100
ns
tSCS
Set up Time, CS– high to CCLK
high
100
ns
Note 5:
A signal is valid if it is above VIH or below VIL and invalid if it is between VIL and VIH.
For the purpoes of this specification the following conditions apply:
a) All input signal are defined as: VIL = 0.4V, VIH = 2.7V, tR < 10ns, tF < 10ns.
b) Delay times are measured from the inputs signal valid to the output signal valid.
c) Setup times are measured from the data input valid to the clock input invalid.
d) Hold times are measured from the clock signal valid to the data input invalid.
ELECTRICAL CHARACTERISTICS (unless otherwise specified, VCC = 5V + 10%, TA =–5
°Cto70°C;
typical characteristic are specified at VCC = 5V, TA =25
°C ; all signals are referenced to GND)
DIGITAL INTERFACES
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
VIL
Input Low Voltage
All digital inputs
DC
except pin AT
AC
0.7
V
0.4
V
VIH
Input High Voltage
All digital inputs
DC
except pin AT
AC
2.0
V
2.7
V
VIL
Input Low Voltage
Input AT
0.5
V
VIH
Input High Voltage
Input AT
VCC
-0.5V
V
VOL
Output Low Voltage
DX,IL = -2.0mA;
DC
all other digital outputs,
AC
IL = –1mA
0.4
0.7
V
V
VOH
Output High Voltage
DX,IL = 2.0mA;
DC
all other digital outputs,
AC
IL = 1mA
2.4
2.0
V
V
IIL
Input Low Current
Any digital input, GND < VIN <VIL
-10
10
µA
IIH
Input High Current
Any digital input, VIH <VIN <VCC
-10
10
µA
IOZ
Output Current in High
impedance (Tri-state)
DX and CO
-10
10
µA
ST5088
25/33



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