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ST6200C 数据表(PDF) 55 Page - STMicroelectronics

部件名 ST6200C
功能描述  8-BIT MCUs WITH A/D CONVERTER, TWO TIMERS, OSCILLATOR SAFEGUARD & SAFE RESET
PDF  100 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST6200C 数据表(HTML) 55 Page - STMicroelectronics

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INSTRUCTION SET (Cont’d)
Conditional Branch. Branch instructions perform
a branch in the program when the selected condi-
tion is met.
Bit Manipulation Instructions. These instruc-
tions can handle any bit in Data space memory.
One group either sets or clears. The other group
(see Conditional Branch) performs the bit test
branch operations.
Control Instructions. Control instructions control
microcontroller operations during program execu-
tion.
Jump and Call. These two instructions are used
to perform long (12-bit) jumps or subroutine calls
to any location in the whole program space.
Table 17. Conditional Branch Instructions
Notes
:
b
3-bit address
rr
Data space register
e
5 bit signed displacement in the range -15 to +16
∆
Affected. The tested bit is shifted into carry.
ee
8 bit signed displacement in the range -126 to +129
*
Not Affected
Table 18. Bit Manipulation Instructions
Notes:
b
3-bit address
*
Not Affected
rr
Data space register
Bit Manipulation Instructions should not be used on Port Data Registers and any registers with read only and/or write only bits (see I/O port
chapter)
Table 19. Control Instructions
Notes:
1.
This instruction is deactivated and a WAIT is automatically executed instead of a STOP if the watchdog function is selected.
∆
Affected
*Not Affected
Table 20. Jump & Call Instructions
Notes:
abc 12-bit address
*
Not Affected
Instruction
Branch If
Bytes
Cycles
Flags
ZC
JRC e
C = 1
1
2
*
*
JRNC e
C = 0
1
2
*
*
JRZ e
Z = 1
1
2
*
*
JRNZ e
Z = 0
1
2
*
*
JRR b, rr, ee
Bit = 0
3
5
*
∆
JRS b, rr, ee
Bit = 1
3
5
*
∆
Instruction
Addressing Mode
Bytes
Cycles
Flags
ZC
SET b,rr
Bit Direct
2
4
*
*
RES b,rr
Bit Direct
2
4
*
*
Instruction
Addressing Mode
Bytes
Cycles
Flags
ZC
NOP
Inherent
1
2
*
*
RET
Inherent
1
2
*
*
RETI
Inherent
1
2
∆∆
STOP (1)
Inherent
1
2
*
*
WAIT
Inherent
1
2
*
*
Instruction
Addressing Mode
Bytes
Cycles
Flags
ZC
CALL abc
Extended
2
4
*
*
JP abc
Extended
2
4
*
*
1



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