ST63126 datasheet(51/86 Pages) STMICROELECTRONICS

51 / 86 page

“1” -The background on the following word is en-

abled by BG1 and the colour is set by R1, G1,

and B1.

WE. Word Enable. The word enable bit defines

whether or not the following word is displayed.

“0” -The word is not displayed.

“1” -If the global enable bit is one, then the word is

displayed.

VSE. Vertical Space Enable. The vertical space

enable bit determines the spacing between lines.

“0” -The space between lines is equal to 0h. The al-

phanumeric character set is implemented in a

5 x 7 format with one empty column to the right

and one empty row above and one below and

stored in a 6 x 9 format.

“1” -The space between lines is defined by the

value in the vertical space register.

Table 13. Format Character Register Colour

Setting.

Colou r

Black

Blue

Green

Cyan

100

Red

Magenta

Yellow

White

Table 14. Format Character Register Size

Setting

GS2 GS1

Vertical Height

Horizontal length

18h

6 TDOT

36h

12 TDOT

18h

6 TDOT

54h

18 TDOT

36h

12 TDOT

54h

18 TDOT

36h

12 TDOT

72h

24 TDOT

TDOT= 2/fosc

ON-SCREEN DISPLAY (Continued)

Display Character

See Data RAM Table Description

for specific Addresses

( Write Only)

D7 D6 D5 D4 D3 D2 D1 D0

C5-C0 = Character Types

control Bit

Fixed to “0”

Unuse d

Figure 60. Display Character Register

Explanation

D7. This bit is not used.

D6. This bit is fixed to “0”.

C5-C0. Character type. The 6 character type bits

define one of the 64 available character types.

These character types are shown on the following

pages.

Character Types

The character set is user defined as ROM mask

option.

The OSD contains seven registers and 80 RAM lo-

cations. The seven registers are the Vertical Start

Address register, Horizontal Start Address regis-

ter, Vertical Space register, Horizontal Space reg-

ister, Background Control register, Global Enable

Global Enable register can be written at any time

by the ST631xx Core. The other six registers and

the RAM can only be read or written to if the global

enable is zero.

The six registers and the RAM are located on two

pages of the paged memory of the ST631xx

MCUs; the Character Bank Select register is lo-

cated outside the paged memory at address EDh.

Each page contains 64 memory locations. This

paged memory is at memory locations 00h to 3Fh

in the ST631xx memory map. A page of memory is

enabled by setting the desired page bit, located in

the Data Ram Bank Register, to a one. The page

page 5, located on the OSD and a one in bit 6 se-

lects page 6 on the OSD. Table 15 shows the ad-

dresses of the OSD registers and RAM.

ST63140,142,126,156

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