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ST72321 数据表(PDF) 157 Page - STMicroelectronics |
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ST72321 数据表(HTML) 157 Page - STMicroelectronics |
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157 / 185 page ![]() ST72321 157/185 12.8 I/O PORT PIN CHARACTERISTICS 12.8.1 General Characteristics Subject to general operating conditions for VDD, fOSC, and TA unless otherwise specified. Figure 86. Connecting Unused I/O Pins Figure 87. Typical IPU vs. VDD with VIN=VSS Notes: 1. Data based on characterization results, not tested in production. 2. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested. 3. When the current limitation is not possible, the VIN maximum must be respected, otherwise refer to IINJ(PIN) specifica- tion. A positive injection is induced by VIN>VDD while a negative injection is induced by VIN<VSS. Refer to Section 12.2.2 on page 137 for more details. 4. Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for example or an external pull-up or pull-down resistor (see Figure 86). Data based on design simulation and/or technology characteristics, not tested in production. 5. The RPU pull-up equivalent resistor is based on a resistive transistor (corresponding IPU current characteristics de- scribed in Figure 87). 6. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external interrupt source. Symbol Parameter Conditions Min Typ Max Unit VIL Input low level voltage 1) CMOS ports 0.3xVDD V VIH Input high level voltage 1) 0.7xVDD Vhys Schmitt trigger voltage hysteresis 2) 0.7 IINJ(PIN) 3) Injected Current on an I/O pin VDD=5V ± 4 mA ΣI INJ(PIN) 3) Total injected current (sum of all I/O and control pins) ± 25 IL Input leakage current VSS≤VIN≤VDD ±1 µA IS Static current consumption Floating input mode4) 200 RPU Weak pull-up equivalent resistor 5) VIN=VSS VDD=5V 50 120 250 k Ω CIO I/O pin capacitance 5 pF tf(IO)out Output high to low level fall time 1) CL=50pF Between 10% and 90% 25 ns tr(IO)out Output low to high level rise time 1) 25 tw(IT)in External interrupt pulse time 6) 1tCPU 10k Ω UNUSED I/O PORT ST72XXX 10k Ω UNUSED I/O PORT ST72XXX VDD 0 10 20 30 40 50 60 70 80 90 22 .5 33 .5 4 4.5 5 5 .5 6 Vdd(V) Ta=1 40°C Ta=9 5°C Ta=2 5°C Ta=-45 °C |
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