ST90R40C6 datasheet(51/56 Pages) STMICROELECTRONICS

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1.1 GENERAL DESCRIPTION

The ST90R40 is a ROMLESS member of the ST9

family of microcontrollers, completely developed

and produced by SGS-THOMSON Microelectron-

ics using a proprietary n-well HCMOS process.

The ROMLESS part may be used for the prototyp-

ing and pre-production phases of development,

and offers the maximum in program flexibility in

production systems.

The ST90R40 is fully compatible with the ST9040

ROM version and this datasheet will thus provide

only information specific to the ROMLESS device.

THE READER IS ASKED TO REFER TO THE

DATASHEET OF THE ST9040 ROM-BASED DE-

VICE.

The ROMLESS ST90R40 can be configured as a

microcontroller able to manage external memory,

or as a parallel processing element in a system

with other processors and peripheral controllers.

The nucleus of the ST90R40 is the advanced Core

which includes the Central Processing Unit (CPU),

the Register File, a 16 bit Timer/Watchdog with 8

bit Prescaler, a Serial Peripheral Interface support-

ing S-BUS, I

2C-bus and IM-bus Interface, plus two

Figure 2. Block Diagram

CPU

1 6-Bit TIMER / WATCHDOG + SPI

SCI

WITH DMA

I/O POR T 7

(SC I )

256 Bytes

2 x 16-bit TIMER

W ITH DM A

I/O PORT 3

( TIMERS )

I/O PORT 0

( Address /Data )

I/O PORT 1

( Address )

512 Bytes

EEPROM

256 Bytes

RAM

I/O PORT 2

( SPI )

I/O PORT 4

( Ana log Inpu ts )

A/ D

CONVERTER

I/O PORT 5

WITH HANDSHAKE

MEMORY BUS

VR0B1385

INT0

INT7

8 bit I/O ports. The Core has independentmemory

and register buses allowing a high degree of pipe-

lining to add to the efficiency of the code execution

speed of the extensive instruction set.

The powerful I/O capabilities demanded by micro-

controller applications are fulfilled by the ST90R40

with up to 56 I/O lines dedicated to memory ad-

dressing or digital Input/Output. These lines are

grouped into up to seven 8 bit I/O Ports and can be

configured on a bit basis under software control to

provide timing and status signals, address lines,

timer inputs and outputs, analog inputs, external

interrupts and serial or parallel I/O with or without

handshake.

Three memory spaces are available: Program Mem-

ory (external), Data Memory (internal and external)

and the Register File, which includes the control and

statusregisters of the on-chip peripherals.

Two 16 bit MultiFunction Timers, each with an 8 bit

Prescaler and 13 operating modes allow simple

use for complex waveform generation and meas-

urement, PWM functions and many other system

timing functions by the usage of the two associated

DMA channels for each timer.

ST90R40

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