ST9291J2 datasheet(3/20 Pages) STMICROELECTRONICS

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GENERAL DESCRIPTION

The ST9291 is a ROM member of the ST9 family of

microcontrollers, completely developed and pro-

duced by SGS-THOMSON Microelectronics using

a proprietary n-well HCMOS process.

The ROM parts are fully compatible with their

EPROM and OTP (One-Time Programmable) ver-

sions, which may be used for the prototyping and

pre-production phases of development.

The nucleus of the ST9291 is the advanced ST9

Core which includes the Central Processing Unit

(CPU), the Register File, a 16-bit Timer/Watchdog

with 8-bit Prescaler, a Serial Peripheral Interface

supporting S-bus, I

2C-bus and IM-bus Interface,

plus two 8-bit I/O ports. The Core has independent

memory and register buses allowing a high degree

of pipelining to add to the efficiency of the code

execution speed of the extensive instruction set.

The powerful I/O capabilities demanded by micro-

controller applications are fulfilled by the ST9291

with up to 32/42 I/O lines dedicated to digital In-

put/Output. These lines are grouped into up to six

I/O Ports and can be configured on a bit basis un-

der software control to provide timing, status sig-

nals, timer inputs and outputs, analog inputs, ex-

ternal interrupts, OSD (On Screen Display) output

and serial or parallel I/O.

Three basic memory spaces are available to sup-

port this wide range of configurations: Program

Memory, Data Memory and the Register File,

which includes the control and status registers of

the on-chip peripherals.

The human interface is provided by the On Screen

Display module, this can produce up to 15 lines of

up to 34 characters from a ROM defined 128 char-

acter set. The 9x13 character can be modified by 4

different pixel sizes, with character rounding, and

formed into words with colour and format attrib-

utes.

A 14-bit VS (Voltage Synthesis) output using the

PWM (Pulse Width Modulation)/BRM (Bit Rate

Modulation) is present to generate tuning voltages

for low-mid range TV set applications. The tuning

voltage is output on one of two separate output

pins.

A 16-bit Slice Timer with an 8-bit Prescaler is also

present.

CPU

16-Bit TIMER/WATCHDOG+SPI

SLICE

TIMER

VOLTAGE

SYNTHESIS

I/O PORT 0

I/O PORT

On Screen

Display

PLL

HSYNC

PLLR

PLLF

VSYNC

I/O PORT 4

P.W.M.

Outputs

P.W.M.

D/ A

Converter

I/O PORT 2

( Analog Inputs )

A/ D

Converter

I/O PORT 5

( SPI )

MEMORY BUS ( Address & Data )

Note : 42 SDIP shown

VR01995E

16 k / 48 k Bytes

ROM or EPROM (1)

384 / 640 Bytes

RAM

256 Bytes

Figure 3. ST9291 Block Diagram

Note 1. EPROM version only

ST9291

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