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ST952 数据表(PDF) 3 Page - STMicroelectronics

部件名 ST952
功能描述  D.A.A. LINE INTERFACE
PDF  12 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST952 数据表(HTML) 3 Page - STMicroelectronics

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PIN DESCRIPTION
5V
Fmod
D5
D6
Figure 2
5V
Fmod
D5
D6
5V
Fmod
Figure 1
D1 - D2
These pins input the AC signal modulated at Fmod
coming from ST75951 through the capacitive iso-
lation barrier.
D3 - D4
These pins output the AC signal modulated at Fmod
in off-hook mode and at Fmod/2 in CLID mode to
ST75951 through the capacitive isolation barrier.
In ring mode, these pins output the ring information,
a differential 6VPP/1MHz signal.
D5 - D6
These control pins input a 5VPP/Fmod signal com-
ing from ST75951 through the capacitive isolation
barrier.
These signals control the off-hook and CLID exter-
nal transistor switches and are sent to the internal
transmit demodulator and receive modulator.
Off-hook mode is enabled with a 5VPP/Fmod signal
sent on D5 and D6 inputs with an opposite phase
(see Figure 1). With a dedicated application it is
possible to reduce the input level to 3VPP.
CLID mode is enabled with a 5VPP/Fmod signal
sent on D5 input only (see Figure 2). With a dedi-
cated application it is possible to reduce the input
level to 3VPP.
LINE
DC positive line connection and line AC signal output.
LCOM
Negative line connection.
LINI
Line AC signal input in off-hook mode.
AIN - AOUT
The transmit signal coming from AIN pin is injected
in AOUT pin to the 2W/4W internal converter stage.
The line echo is minimized if R3, connected be-
tween LINE and VDR pins is equal to 620
Ω.
GAIN
R1 connected on this pin fixes the transmit gain.
The R1 recommanded value, on a 600
Ω AC line
termination, is 82
Ω.
RIN
During the ring burst, a 1MHz oscillator is powered
on this pin and a 6VPP/1MHz signal is sent on D3
and D4 to indicate the ring presence.
IREF
Internal reference current source setting, R4 must
be equal to 82k
Ω.
VDR
Power supply for the transmit and receive paths in
Off-Hook mode.
VDREF
Internal resistor reference.
SET
Line gyrator AC/DC filter.
OHC
When D5 and D6 inputs a 5VPP/Fmod signal in
opposite phase, this pin puts ON the hook switch
external Q1/Q2 transistor stage.
IDC
When D5 input a 5VPP/Fmod signal, this pin puts
ON the CLID external Q3/Q4 transistor stage.
R2 limits the line current in CLID mode at 1mA
max.
COM
Commun output for off-hook and CLID external
transistor stages
TER1 - TER2
These pins control the external Q5 transistor, in
which the main part of the line current goes
through to meet the line DC, V = f(IL), termination
requirements.
IDI
Line AC signal input in CLID mode.
IDG
Power supply for the receive path in CLID mode.
LIM1 - LIM2
200mA over current detection for device protection.
TOFF
Internal Reference Supply.
ST952
3/12



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