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STA020 数据表(PDF) 8 Page - STMicroelectronics

部件名 STA020
功能描述  96kHz DIGITAL AUDIO INTERFACE TRANSMITTER
PDF  12 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STA020 数据表(HTML) 8 Page - STMicroelectronics

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Transparent Mode
In certain applications it is desirable to receive digi-
tal audio data with the STA120 and retransmit it
with the STA020. In this case, channel status, user
and validity information must pass through unal-
tered. For studio environments, AES recommends
that signal timing synchronization be maintained
throughout the studio. Frame synchronization of
digital audio signals input to and output from a
piece of equipment must be within +/-5%.
The transparent mode of the STA020 is selected
by setting TRNPT, pin 24, high. In this mode, the
CBL pin becomes an input, allowing direct con-
nection of the outputs of the STA120 to the inputs
of the STA020 as shown in Figure 18. The trans-
mitter and receiver are synchronized by the
FSYNC signal. CBL specifies the start of a new
channel status block boundry, allowing the trans-
mit block structure to be slaved to the block struc-
ture of the receiver.
In the transparent mode, C, U and V are now
transmitted with the current audio sample as
shown in Figure 5 (TRNPT high) and the dedi-
cated channel status pins are ignored.
When FSYNC is a word clock (Format 2), CBL is
sampled when left C, U, V are sampled. When
FSYNC is Left/Right, CBL is sampled when left
C, U, V are sampled. The channel status block
boundry is reset when CBL transitions from low to
high (based on two successive samples of CBL).
MCK for the STA020 is normally expected to be
128 times the sample frequency, in the trasparent
mode MCK must be 256 Fs.
Professional Mode
Setting PRO low places the STA020 in profes-
sional mode as shown in Figure 6. In professional
mode, channel status bit 0 is transmitted as a one
and bits 1, 2, 3, 4, 6, 7 and 9 can be controlled
via dedicated pins. The pins are actually the in-
verse of the identified bit.
For example, tying the C1 pin low places a one in
channel status bit 1. As shown in the application
Note, Overview of AES/EBU Digital Audio Inter-
face Data Structures, C1 indicates audio/non-
audio; C6 and C7 determine the sample fre-
quency and C9 allows the encoded channel
mode to be stereophonic. EM1 and EM0 deter-
mine emphasis and encode C2, C3, C4 as shown
in Table 2. The dedicated channel status pins are
read at the appropriate time and are logically
OR’ed with data input on the channel status port, C.
In Transparent Mode, these dedicated channel
status pins are ignored and channel status bits
are input at the C pin.
Consumer Mode
Setting PRO high places the STA020 in consumer
mode which redefines the pins as shown in Figure
7. In consumer mode, channel status bit 0 is trans-
mitted as a zero and channel status bits 2, 3, 8, 9,
15, 24 and 25 are controlled via dedicatedpins.
The pins are actually the inverse of the bit so if
pin C2 is tied high, channel status bit 2 will be
transmitted as a zero. Also, FC0 and FC1 are en-
coded versions of channel status bits 24 and 25,
which define the sample frequency.
When FC0 and FC1 are both high, the part is
placed in a CD submode which activates the CD
subcode port. This submode is described in detail
in the next section. Table 3 describes the encod-
ing of C24 and C25 through the FC1 and FC0
pins. According to AES/EBU standards, C2 is
copy prohibit/permit. C3 specifies pre-emphasis,
C8 and C9 define the category code and C15
identifies the generation status of the transmitted
material (i.e. first generation, second generation).
Table 2. Emphasis Encoding
EM1
EM0
C2
C3
C4
001
11
011
10
101
00
110
00
Table 3. Sample Frequency Encoding
FC1
FC0
C24
C25
Comments
0000
44.1kHz
0101
48kHz
1011
32kHz
1100
44.1kHz, CD Mode
MCK
CBL
C
U
V
FSYNC
DATA
PROCESSING
RXP
RXN
SCK
STA120
STA020
TXN
TXP
TRNPT
V+
D97AU605
SDATA
Figure 5. Transparent Mode Interface.
STA020
8/12



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