FUNCTIONAL DESCRIPTION

The STB5600 GPS front-end is fed with the signal from an active antenna, via a ceramic RF filter. The

gain between the antenna element

and the STB5600 is expected to be between 10dB and 35dB

overall, made up of the antenna LNA gain, the feeder loss, connector loss, and the ceramic filter loss.

In order to use an off-the-shelf ceramic filter, conventionally 50 Ohms single ended, a matching circuit is

used. (see appendix A.1), which provides a 300 Ohm differential drive to the STB5600. A similar circuit

can be used to feed the LO signal if using the recommended low-cost oscillator circuit (appendix A.3).

Note that the STB5600 radio architecture and the oscillator described here are covered by various

patents held by SGS-Thomson and by others. The use of the circuits described in this data-sheet for any

other purpose may infringe such patents.

The differential input signal is amplified by the RF-Amp and mixed with the oscillator signal amplified

from the LO+,LO- inputs to generate a balanced 20.46MHz IF signal. The LO buffer amplifier may be

fed differential or single ended signals, at levels between -60dBm and -20dBm .

The 20MHz differential signal from the mixer is fed through an external LC filter to suppress undesirable

signals and mixer products. The multi-stage high-sensitivity limiting amplifier is connected to a D-type

latch clocked by an internally derived 16MHz clock.. The effect of sampling the 20MHz signal at 16MHz

is to create a sub-sampling alias at 4MHz. This is fed to the output level-converters.

The 80MHz oscillator signal may be provided single-ended or differentially to the high impedance

80MHz+, 80MHz- inputs. Any unused inputs should be connected to GNDLOGIC via a 1nF capacitor.

The 80MHz signal is amplified, then divided by 5 to create the 16.368MHz clock required by the

ST20GP1 processor, also used to clock the output latch of the STB5600.

The output latch samples the 20.46MHz intermediate frequency at a 16.368MHz rate, performing the

dual function of second downconversion and latching. The downconversion occurs by sub-sampling

aliasing, such that the digital output represents a 4.096MHz centre frequency

The output buffers perform level translation from the internal ECL levels to CMOS compatible outputs

referred to external ground.

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Val ue

Uni t

DC Supply Voltage

5.9

V

RF+, RF- RF I nput

8

dBm

Junct ion Temperature

150

St orage Temperature Range

-40 to 125

Thermal Resistance Junction-ambient

80

STB5600

2/10