STB5610

4/11

Data @ 4 MHz

CMOS levels

CLK @ 16MHz

CMOS levels

SAW Filter

16.368 MHz

Quartz

Two gain

LNA

D

CK

Q

PLL

~

1.55 GHz

20 MHz

Passive

Antenna

RF Amp.

Mixer

D Latch Output buffer

VCO

ExternalTank

1.57 GHz

Gain

Select.

CE

CE2

Loop

Filter

LC Filter

LC Filter

Freq.

select

20 MHz

4 MHz

16 MHz

ASout

BLOCK DIAGRAM (GPS L1)

LNA section

The RF input signal is amplified by two gain levels

LNA. Using gain control pin the LNA gain is set to

19 dB to support passive antenna or 10 dB to sup-

port active antenna. The LNA output signal is fil-

tered by 1575.42 MHz SAW filter.

RF Amplifier plus mixer section

The 1575.42 MHz input signal, amplified by RF

amp., is mixed with the VCO signal to generate a

differential 20.46MHz IF signal

IF section

Two LC filters at mixer output and at first limiting

output are used to suppress undesirable signals

and mixer products. The second stage limiting

amplifier is connected to a D-Type latch clocked

by 16.368MHz crystal oscillator signal. The effect

of sampling the 20.46MHz signal at 16.368MHz is

to create sub-sampling alias at 4.092MHz. This is

fed to the output level converter.

Output section

The output buffers perform level translation from

the internal ECL levels to CMOS output levels re-

ferred to ground. The Data signal changes during

the clock signal negative edge.

Power supplies

The STB5610, has been designed to support

from 2.7 V to 3.6 V supply voltage.

VCO and PLL

Using external tank the VCO is able to provide

very low phase noise signal. Through the freq. se-

lector pin the VCO signal is set at 1554.96 MHz

and at 1571.328 MHz. The on-chip reference os-

cillator uses a low cost 16.368 MHz crystal.

Antenna sensor circuitry

Integrated sensor circuitry is able to evaluate the

antenna current consumption; the Asout pin out-

put provides this info externally. Using external

sensing resistor of 10 Ohm if the antenna current

consumption is inside the range 10mA…40mA

(active antennas typical current consumption) the

Asout output logic level is High, if the antenna cur-

rent consumption is outside the above reported

range (passive antenna or problem on antenna

connection) the Asout output logic level is low.

Chip enable

Using the CE pin it is possible to switch off all the

chip ( neither data nor clock available).

Using CE2 pin it is possible to disable the analog

portion of the chip (no data available) maintaining

the digital portion active (Clock available) optimiz-

ing the chip current consumption.

FUNCTIONAL DESCRIPTION