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TAS5701PAPR 数据表(PDF) 7 Page - Texas Instruments |
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TAS5701PAPR 数据表(HTML) 7 Page - Texas Instruments |
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7 / 26 page ![]() ABSOLUTE MAXIMUM RATINGS TAS5701 www.ti.com ...................................................................................................................................................................................................... SLOS559 – JUNE 2008 TERMINAL FUNCTIONS (continued) TERMINAL 5-V TERMINATION I/O(1) DESCRIPTION TOLERANT (2) (3) NAME NO. RESET 16 DI 5-V Pullup Reset, active-low. A system reset is generated by applying a logic low to this terminal. RESET is an asynchronous control signal that sets the VALID outputs low, and places the PWM in the hard mute state (stop switching). Gain is immediately set to full attenuation. Upon the release of RESET, if PDN is high, the system performs a 4-ms to 5-ms device initialization and sets the gain and format to the settings determined by the hardware pins. SCLK 23 DI 5-V Serial audio data clock (shift clock). SCLK is the serial audio port input data bit clock. SDIN1 25 DI 5-V Serial audio data 1 input is one of the serial data input ports. SDIN1 supports three discrete (stereo) data formats. SDIN2 24 DI 5-V Serial audio data 2 input is one of the serial data input ports. SDIN2 supports three discrete (stereo) data formats. SUB_PWM– 39 DO Subwoofer negative PWM output. BD modulated signal. SUB_PWM+ 40 DO Subwoofer positive PWM output. BD modulated signal. TEST1 7 DI Test pin. Connect directly to GND. VALID 38 DO Output indicating validity of ALL PWM channels, active-high. This pin is connected to an external power stage. If no external power stage is used, leave this pin floating. VDD 6 P Power supply for VREG (10.8 V to 13.2 V) VR_ANA 14 P Internally regulated 1.8-V analog supply voltage. This terminal must not be used to power external devices. VR_DIG 27 P Internally regulated 1.8-V analog supply voltage. This terminal must not be used to power external devices. VREG 43 P Digital regulator output. Not to be used for powering external circuitry. VREG_EN 18 DI Pulldown Voltage regulator enable. Connect directly to GND. over operating free-air temperature range (unless otherwise noted) (1) VALUE UNIT GVDD, VDD –0.3 to 13.2 PVDD –0.3 to 23 DVDD –0.3 to 3.6 Supply voltage V AVDD –0.3 to 3.6 OUT_X to GND_X –0.3 to 30 BST_X to GND_X –0.3 to 43.2 3.3-V digital input –0.5 to DVDD + 0.5 Input voltage V 5-V tolerant(2) digital input –0.5 to DVDD + 2.5 Input clamp current, IIK (VI < 0 or VI > 1.8 V) ±20 mA Output clamp current, IOK (VO < 0 or VO > 1.8 V) ±20 mA Operating free-air temperature 0 to 85 °C Operating junction temperature range 0 to 150 °C Storage temperature range, Tstg –40 to 125 °C (1) Stresses beyond those listed under absolute ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operation conditions are not implied. Exposure to absolute-maximum conditions for extended periods may affect device reliability. (2) 5-V tolerant inputs are PDN, RESET, MUTE, SCLK, LRCLK, MCLK, SDIN1, SDIN2. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): TAS5701 |
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