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AD9388ABSTZ-5P 数据表(PDF) 21 Page - Analog Devices |
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AD9388ABSTZ-5P 数据表(HTML) 21 Page - Analog Devices |
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21 / 28 page ![]() AD9388A Rev. B | Page 21 of 28 REGISTER MAP ARCHITECTURE The AD9388A registers are controlled via a 2-wire serial (I2C-compatible) interface. The AD9388A has eight maps, each with a unique I2C address. The state of the ALSB pin (Pin 13) sets Bit 2 of each register map address in Table 10. Table 10. AD9388A Map Addresses Register Map Address with ALSB = Low Address with ALSB = High Programmable Address Location at Which Address is Programmable User Map 0x40 0x42 Not programmable N/A User Map 1 0x44 0x46 Programmable User Map 2, Register 0xEB User Map 2 0x60 0x62 Programmable User Map, Register 0x0E VDP Map 0x48 0x4A Programmable User Map 2, Register 0xEC Reserved Map 0x4C 0x4E Programmable User Map 2, Register 0xEA HDMI Map 0x68 0x6A Programmable User Map 2, Register 0xEF Repeater/KSV Map 0x64 0x66 Programmable User Map 2, Register 0xED EDID Map 0x6C 0x6E Programmable User Map 2, Register 0xEE SCL SDA SA: PROGRAMMABLE SA: PROGRAMMABLE SA: PROGRAMMABLE SA: PROGRAMMABLE SA: PROGRAMMABLE SA: PROGRAMMABLE SA: PROGRAMMABLE RESERVED MAP REPEATER/ KSV MAP EDID MAP HDMI MAP SA: 0x40 VDP MAP USER MAP 2 USER MAP 1 USER MAP Figure 7. Register Map Access Through Main I2C Port |
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