ADA4898-1

Rev. 0 | Page 5 of 16

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter

Rating

Supply Voltage

36 V

Power Dissipation

See Figure 3

Differential Mode Input Voltage

±1.5 V

Common-Mode Input Voltage

±11.4 V

Storage Temperature Range

−65°C to +150°C

Operating Temperature Range

−40°C to +105°C

Lead Temperature (Soldering, 10 sec)

300°C

Junction Temperature

150°C

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

THERMAL RESISTANCE

specified for a device soldered in the circuit board with its

exposed paddle soldered to a pad on the PCB surface that is

thermally connected to a copper plane, with zero airflow.

Table 4.

Package Type

Unit

8-Lead SOIC with EP on Four-Layer Board

47

29

°C/W

MAXIMUM POWER DISSIPATION

The maximum safe power dissipation in the ADA4898-1

package is limited by the associated rise in junction temperature

transition temperature, the plastic changes its properties. Even

temporarily exceeding this temperature limit can change the

stresses that the package exerts on the die, permanently shifting

the parametric performance of the ADA4898-1. Exceeding a

junction temperature of 150°C for an extended period can

result in changes in the silicon devices, potentially causing

failure.

quiescent power dissipation and the power dissipated in the

package due to the output load drive. The quiescent power is

upon the particular application. For each output, the power due

to load drive is calculated by multiplying the load current by the

associated voltage drop across the device. RMS voltages and

currents must be used in these calculations.

addition, more metal directly in contact with the package leads

from metal traces, through holes, ground, and power planes

package must be soldered to a pad on the PCB surface that is

Figure 3 shows the maximum safe power dissipation in the

package vs. the ambient temperature for the 8-lead SOIC_EP

(47°C/W) on a JEDEC standard four-layer board, with its

underside paddle soldered to a pad that is thermally connected

0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

AMBIENT TEMPERATURE (°C)

0

20406080

100

10

30

50

70

90

–40

–20

–30

–10

Figure 3. Maximum Power Dissipation vs. Ambient Temperature

ESD CAUTION