ADL5513-ACPZ-R2 datasheet(5/12 Pages) AD

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Preliminary Technical Data

ADL5513

Rev. PrA | Page 5 of 12

Parameter

Conditions

Min

Typ

Max

Unit

3.6 GHz

Output Voltage: High Power in

PIN = -10 dBm,

1.6

Output Voltage: Low Power in

PIN = -60 dBm

0.6

±3.0 dB Dynamic Range

CW input, TA = +25°C

±1.0 dB Dynamic Range

CW input, TA = +25°C

±0.5 dB Dynamic Range

CW input, TA = +25°

Maximum Input Level, ±1.0 dB

Minimum Input Level, ±1.0 dB

-66

Deviation vs. Temperature

Deviation from output at 25°C

-40°C < TA < +85°C; PIN = -10 dBm

±0.64

-40°C < TA < +85°C; PIN = −30 dBm

±0.64

-40°C < TA < +85°C; PIN = -50 dBm

±0.62

-40°C < TA < +125°C; PIN = -10 dBm

±0.856

-40°C < TA < +125°C; PIN = − 30 dBm

±0.926

-40°C < TA < +125°C; PIN = -50 dBm

±0.937

Logarithmic Slope

mV/dB

Logarithmic Intercept

-90.57

dBm

Input Impedance

TBD

Ω/pF

SETPOINT INPUT

Pin VSET

Voltage Range

Log conformance error ≤1 dB Min

TBD

Log conformance error ≤1 dB Max

TBD

Current Limit Source/Sink

1% change

TBD

OUTPUT INTERFACE

Rise Time

Input level = no signal to −10dBm, 10% to 90% CLPF = 10 pF

Fall Time

Input level = no signal to −10dBm, 10% to 90% CLPF = 10 pF

POWER SUPPLY INTERFACE

Pin VPOS

Supply Voltage

2.7

5.5

Quiescent Current

25C RF in =-55 dBm

Supply Current

When disabled

TBD

μA

POWER-DOWN INTERFACE

Pin PWDN

Logic Level Threshold

Logic LO enables Logic HI disables

VPOS − 0.7 V

Enable Time

PWDN LO to OUT at 100% final value,

CLPF = 10pF, RF in = −10 dBm

143

Disable Time

PWDN HI to OUT at 10% final value,

CLPF = 10pF, RF in = −10 dBm

100

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