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AT89C5132-ROTUL 数据表(PDF) 123 Page - ATMEL Corporation |
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AT89C5132-ROTUL 数据表(HTML) 123 Page - ATMEL Corporation |
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123 / 182 page ![]() 123 4173E–USB–09/07 AT89C5132 AT89C5132 captures data from the SI line while the selected slave captures data from the SO line. For simplicity, the following figures depict the SPI waveforms in idealized form and do not pro- vide precise timing information. For timing parameters refer to the Section “AC Characteristics”. Note: 1. When the peripheral is disabled (SPEN = 0), default SCK line is high level. Figure 19-5. Data Transmission Format (CPHA = 0) Figure 19-6. Data Transmission Format (CPHA = 1) 19.1.5 SS Management Figure 19-5 shows an SPI transmission with CPHA = 0, where the first SCK edge is the MSB capture point. Therefore the slave starts to output its MSB as soon as it is selected: SS asserted to low level. SS must then be deasserted between each byte transmission (see Figure 19-7). SPDAT must be loaded with data before SS is asserted again. 1 2 3 4 5 6 7 8 MSB bit 1 LSB bit 2 bit 4 bit 3 bit 6 bit 5 bit 1 bit 2 bit 4 bit 3 bit 6 bit 5 MSB LSB MOSI (from Master) MISO (from Slave) SCK (CPOL = 1) SCK (CPOL = 0) SPEN (Internal) SCK Cycle Number SS (to Slave) to Capture Point 1 2 3 4 5 6 7 8 MSB bit 1 LSB bit 2 bit 4 bit 3 bit 6 bit 5 bit 1 bit 2 bit 4 bit 3 bit 6 bit 5 MSB LSB MOSI (from Master) MISO (from Slave) SCK (CPOL = 1) SCK (CPOL = 0) SPEN (Internal) SCK Cycle Number SS (to Slave) Capture Point |
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