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V54C365804VC 数据表(PDF) 21 Page - Mosel Vitelic, Corp |
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V54C365804VC 数据表(HTML) 21 Page - Mosel Vitelic, Corp |
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21 / 54 page ![]() 21 V54C365804VC Rev. 0.6 September 1999 MOSEL VITELIC V54C365804VC 6.2 Write Interrupted by a Read (Burst Length = 4, CAS latency = 2, 3, 4) 7. Burst Write with Auto-Precharge Burst Length = 2, CAS latency = 2, 3, 4) COMMAND NOP WRITE A READ B NOP NOP NOP NOP NOP NOP tCK2, I/O’s CAS latency = 2 DIN A0 tCK3, I/O’s CAS latency = 3 DIN A0 tCK4, I/O’s CAS latency = 4 DIN A0 CLK T0 T2 T1 T3 T4 T5 T6 T7 T8 Input data for the Write is ignored. DOUT B3 DOUT B0 DOUT B1 DOUT B2 DOUT B3 DOUT B0 DOUT B1 DOUT B2 don’t care don’t care don’t care don’t care don’t care don’t care DOUT B0 DOUT B1 DOUT B2 Input data must be removed from the I/O’s at least one clock cycle before the Read dataAPpears on the outputs to avoid data contention. COMMAND NOP NOP NOP WRITE A Auto-Precharge CLK T0 T2 T1 T3 T4 T5 T6 T7 T8 NOP BANK A ACTIVE NOP NOP DIN A0 DIN A1 DIN A0 DIN A1 * * I/O’s CAS latency = 3 I/O’s CAS latency = 2 I/O’s CAS latency = 4 Begin Autoprecharge Bank can be reactivated after trp * tWR tWR tRP tRP DIN A0 DIN A1 tWR tRP NOP * |
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