C164CL datasheet(43/484 Pages) INFINEON

43 / 484 page

C164CI/C164SI

Derivatives

Memory Organization

User’s Manual

3-5

V3.1, 2002-02

Note: The upper 256 Bytes of the SFR area, the ESFR area, and the Internal RAM are

bit-addressable (see shaded blocks in Figure 3-3).

Code accesses are always made on even byte addresses. The highest possible code

storage location in the Internal RAM is either 00’FDFEH for single word instructions or

00’FDFCH for double word instructions. The respective location must contain a branch

instruction (unconditional), because sequential boundary crossing from Internal RAM to

the SFR area is not supported and causes erroneous results.

Any word and byte data in the Internal RAM can be accessed via indirect or long 16-bit

addressing modes, if the selected DPP register points to data page 3. Any word data

access is made on an even byte address. The highest possible word data storage

location in the internal RAM is 00’FDFEH. For PEC data transfers, the internal RAM can

be accessed independent of the contents of the DPP registers via the PEC source and

destination pointers.

The upper 256 Bytes of the Internal RAM (00’FD00H through 00’FDFFH) and the GPRs

of the current bank are provided for single bit storage, and thus they are bit-addressable.

System Stack

The system stack may be defined within the Internal RAM. The size of the system stack

is controlled by bitfield STKSZ in register SYSCON (see Table 3-1).

For all system stack operations the on-chip RAM is accessed via the Stack Pointer (SP)

Only word accesses are supported to the system stack. A stack overflow (STKOV)

upper limits of the selected stack area. These two stack boundary registers can be used

both for protection against data destruction and for implementation of a circular stack

with hardware-supported system stack flushing and filling (except for option ‘111’). The

technique for implementing the circular stack is described in Chapter 22.

Table 3-1

System Stack Size Encoding

<STKSZ>

Stack Size (words) Internal RAM Addresses (words)

0 0 0B

256

00’FBFEH … 00’FA00H (Default after Reset)

0 0 1B

128

00’FBFEH … 00’FB00H

0 1 0B

00’FBFEH … 00’FB80H

0 1 1B

00’FBFEH … 00’FBC0H

1 0 0B

512

00’FBFEH … 00’F800H

1 0 1B

–

Reserved. Do not use this combination.

1 1 0B

–

Reserved. Do not use this combination.

1 1 1B

1024

00’FDFEH … 00’F600H (Note: No circular stack)

C164CL 数据表(PDF) 43 Page - Infineon Technologies AG

C164CL 数据表(HTML) 43 Page - Infineon Technologies AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载