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L6393D 数据表(PDF) 11 Page - STMicroelectronics

部件名 L6393D
功能描述  Half-bridge gate driver
PDF  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L6393D 数据表(HTML) 11 Page - STMicroelectronics

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background image
L6393
Electrical characteristics
11/20
Symbol
Pin
Parameter
Test condition
Min
Typ
Max
Unit
Driving buffers section
Iso
10, 13
High/low side source short
circuit current
VIN = Vih (tp < 10 µs)
270
mA
Isi
High/low side sink short
circuit current
VIN = Vil (tp < 10 µs)
430
mA
Logic inputs
Vil
1, 2, 3
Low level logic threshold
voltage
0.83
V
Vih
High level logic threshold
voltage
2.21
V
IPHASEh
1
PHASE logic “1” input bias
current
PHASE = 15 V
175
260
µA
IPHASEl
PHASE logic “0” input bias
current
PHASE = 0 V
1
µA
IBRAKEh
3
BRAKE logic “1” input bias
current
BRAKE = 15 V
175
260
µA
IBRAKEl
BRAKE logic “0” input bias
current
BRAKE = 0 V
1
µA
ISDh
2
SD logic “1” input bias
current
SD = 15 V
30
100
µA
ISDl
SD logic “0” input bias
current
SD = 0 V
1
µA
1.
RDSon is tested in the following way:
RDSon = [(VCC - VCBOOT1) - (VCC - VCBOOT2)] / [I1(VCC,VCBOOT1) - I2(VCC,VCBOOT2)]
where I1 is pin 14 current when VCBOOT = VCBOOT1, I2 when VCBOOT = VCBOOT2.
Table 8.
DC opereation electrical characteristics (VCC = 15 V; TJ = +25 °C) (continued)
Table 9.
Sense comparator
Symbol
Pin
Parameter
Test conditions
Min
Typ
Max
Unit
Vio
8, 9
Input offset voltage
±10
TBD
mV
Iib
Input bias current
1
µA
Vol
6
Open drain low level
Output voltage
Iod = - 3 mA
0.5
V
td_comp
Comparator delay
CPOUT pulled to 5 V
through 100k
Ω resistor
110
210
ns
SR
6
Slew rate
CL = 180 nF, Rpu = 5 kΩ
TBD
V/
µs



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