M41ST84W

Clock operation

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When the clock information matches the alarm clock settings based on the match criteria

defined by RPT5-RPT1, the AF (alarm flag) is set. If AFE (alarm flag enable) is also set, the

alarm condition activates the IRQ/FT/OUT pin.

Note:

If the address pointer is allowed to increment to the flag register address, an alarm condition

will not cause the interrupt/flag to occur until the address pointer is moved to a different

address. it should also be noted that if the last address written is the “alarm seconds,” the

address pointer will increment to the flag address, causing this situation to occur.

The IRQ/FT/OUT output is cleared by a READ to the flags register as shown in Figure 14. A

subsequent READ of the flags register is necessary to see that the value of the alarm flag

has been reset to '0.'

The IRQ/FT/OUT pin can also be activated in the battery backup mode. The IRQ/FT/OUT

will go low if an alarm occurs and both ABE (alarm in battery backup mode enable) and AFE

are set. The ABE and AFE bits are reset during power-up, therefore an alarm generated

during power-up will only set AF. The user can read the flag register at system boot-up to

determine if an alarm was generated while the M41ST84W was in the deselect mode during

power-up. Figure 15 on page 22 illustrates the backup mode alarm timing.

Figure 14.

Alarm interrupt reset waveform

Table 4.

Alarm repeat modes

RPT5

RPT4

RPT3

RPT2

RPT1

Alarm setting

11111

Once per second

11110

Once per minute

11100

Once per hour

11000

Once per day

10000

Once per month

00000

Once per year

AI03664

IRQ/FT/OUT

ACTIVE FLAG

0Fh

0Eh

10h

HIGH-Z