Clock operation

M41T00S

14/26

Therefore, each calibration step has the effect of adding 512 or subtracting 256 oscillator

cycles for every 125,829,120 actual oscillator cycles, that is +4.068 or –2.034 ppm of

adjustment per calibration step in the calibration register (see Figure 11 on page 15).

Assuming that the oscillator is running at exactly 32,768 Hz, each of the 31 increments in

the calibration byte would represent +10.7 or –5.35 seconds per month which corresponds

to a total range of +5.5 or –2.75 minutes per month.

Two methods are available for ascertaining how much calibration a given M41T00S may

require.

The first involves setting the clock, letting it run for a month and comparing it to a known

accurate reference and recording deviation over a fixed period of time. Calibration values,

including the number of seconds lost or gained in a given period, can be found in application

ability to calibrate the clock as the environment requires, even if the final product is

packaged in a non-user serviceable enclosure. The designer could provide a simple utility

that accesses the calibration byte.

The second approach is better suited to a manufacturing environment, and involves the use

of the FT/OUT pin. The pin will toggle at 512Hz, when the Stop bit (ST, D7 of 00h) is '0,' and

the Frequency Test bit (FT, D6 of 07h) is '1.'

Any deviation from 512 Hz indicates the degree and direction of oscillator frequency shift at

the test temperature. For example, a reading of 512.010124 Hz would indicate a +20 ppm

oscillator frequency error, requiring a –10 (XX001010) to be loaded into the calibration byte

for correction. Note that setting or changing the Calibration Byte does not affect the

frequency test output frequency.

operation. A 500-10k resistor is recommended in order to control the rise time. The FT bit is

cleared on power-down.