 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
M41T82 数据表(PDF) 49 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
M41T82 数据表(HTML) 49 Page - STMicroelectronics |
|
|
49 / 58 page  M41T82 M41T83 DC and AC parameters 49/58 Figure 26. Bus timing requirement sequence Table 24. AC characteristics Sym Parameter(1) 1. Valid for ambient operating temperature: TA = –40 to 85°C; VCC = 2.38 to 5.5 V (except where noted). Min Typ Max Units fSCL SCL clock frequency 0 400 Hz tLOW Clock low period 1.3 µs tHIGH Clock high period 600 ns tR SDA and SCL rise time 300 ns tF SDA and SCL fall time 300 ns tHD:STA START condition hold time (after this period the first clock pulse is generated) 600 ns tSU:STA START condition setup time (only relevant for a repeated start condition) 600 ns tSU:DAT (2) 2. Transmitter must internally provide a hold time to bridge the undefined region (300 ns max) of the falling edge of SCL. Data setup time 100 ns tHD:DAT Data hold time 0 µs tSU:STO STOP condition setup time 600 ns tBUF Time the bus must be free before a new transmission can start 1.3 µs AI00589 SDA P tSU:ST tSU:STA tHD:STA SR SCL tSU:DAT tF tHD:DAT tR tHIGH tLOW tHD:STA tBUF S P |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
