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STL30NF3LL 数据表(PDF) 3 Page - STMicroelectronics |
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STL30NF3LL 数据表(HTML) 3 Page - STMicroelectronics |
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3 / 6 page ![]() 3/6 STL30NF3LL ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) Turn-on Delay Time VDD = 15 V, ID = 30 A RG = 4.7Ω VGS = 4.5V (see test circuit, Figure 1) 22 ns tr Rise Time 130 ns Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 24 V, ID = 30 A, VGS = 5 V (see test circuit, Figure 1) 30 9 12.5 40 nC nC nC Symbol Parameter Test Conditions Min. Typ. Max. Unit td(off) tf Turn-off-Delay Time Fall Time VDD = 15 V, ID = 30 A, RG =4.7Ω, VGS = 4.5 V (see test circuit, Figure 1) 36.5 36.5 ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD Source-drain Current 30 A ISDM (2) Source-drain Current (pulsed) 120 A VSD (1) Forward On Voltage ISD = 15 A, VGS = 0 1.2 V trr Qrr IRRM Reverse Recovery Time Reverse Recovery ChargeReverse Recovery Current ISD = 30 A, di/dt = 100A/µs, VDD = 15 V, Tj = 150°C (see test circuit, Figure 3) 65 105 3.4 ns nC A |
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