TS507CD datasheet(15/20 Pages) STMICROELECTRONICS

15 / 20 page

TS507

Application note

15/20

Application note

An application note, based on the TS507, describes three compensation techniques for

solving stability issues when driving large capacitive loads. Two of them are briefly explained

here. For more details, refer to the application note on www.st.com. To find it, do a keyword

search for AN2653.

3.1

Out-of-the-loop compensation technique

The first technique, named the out-of-the-loop compensation, uses an isolation resistor,

ROL, added in series between the output of the amplifier and its load (see Figure 27). The

resistor isolates the op-amp feedback network from the capacitive load. This compensation

method is effective, but the drawback is a limitation on the accuracy of Vout depending on

the resistive load value.

Figure 27.

Out-of-the-loop compensation schematics

To help implement the compensation, the abacus given in Figure 28 to Figure 29 provide the

ROL value to choose for a given CL and phase/gain margins. These abacus are plotted in

the case of a voltage follower configuration with a load resistor of 10 k

Ω at 25°C.

Figure 28.

Gain margin abacus : serial resistor

to be added in a voltage follower

configuration at 25°C

Figure 29.

Phase margin abacus : serial

resistor to be added in a voltage

follower configuration at 25°C

10p

1 00p

10n

1 00n

1µ

10µ

0.01

0.1

100

= 5 V

ic m

= 2,5 V

T = 25 °C

= 10 k

U N S TAB L E

ST ABL E

Lo a d C a pac ito r (F )

10p

10 0p

1 n

10n

100 n

1 µ

10µ

0.01

0.1

100

30 °

20 °

10 °

= 5 V

ic m

= 2,5 V

T = 25 °C

= 10 k

0 °

UN S T A B L E

ST AB L E

Loa d C a pa c ito r (F )

TS507CD 数据表(PDF) 15 Page - STMicroelectronics

TS507CD 数据表(HTML) 15 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

数据表下载