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STLC3055 数据表(PDF) 2 Page - STMicroelectronics |
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STLC3055 数据表(HTML) 2 Page - STMicroelectronics |
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2 / 22 page ![]() these applications is the integrated ringing gener- ator. The control interface is a parallel type with open drain output and 3.3V logic levels. The metering pulses are generated on chip start- ing from two logic signals (0, 3.3V) one define the metering pulse frequency and the other the me- tering pulse duration. An on chip circuit then pro- vides the proper shaping and filtering. Metering pulse amplitude and shaping (rising and decay time) can be programmed by external compo- nents. A dedicated cancellation circuit avoid pos- sible CODEC input saturation due to Metering pulse echo. Constant current feed can be set from 20mA to 40mA. Off-hook detection threshold is program- mable from 5mA to 9mA. The device, developed in BCD100II technology (100V process), operates in the extended tem- perature range and integrates a thermal protec- tion that sets the device in power down when Tj exceeds 140 °C. ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit Vpos Positive Supply Voltage -0.4 to +17 V A/BGND AGND to BGND -1 to +1 V Vdig Pin D0, D1, D2, DET, CKTTX -0.4 to 5.5 V Tj Max. junction Temperature 150 °C Vbtot (1) Vbtot=|Vpos|+|Vbat|. (Total voltage applied to the device supply pins). 100 V (1) Vbat is self generated by the on chip DC/DC converter and can be programmed via RF1 and RF2. RF1 and RF2 shall be selected in order to fulfil the a.m limits (see External Components Table page 10) 1 2 3 5 6 4 7 8 9 10 17 11 18 19 20 21 22 44 43 42 41 39 40 38 37 36 35 34 28 27 26 24 23 25 33 32 31 29 30 N.C. RES PD D1 D0 D2 CTTX2 CTTX1 CKTTX N.C. DET RLIM AGND CVCC RSENSE GATE VPOS CSVR ILTF RD IREF RTH D97TL279A 12 13 14 15 16 PIN CONNECTION DESCRIPTION (continued) STLC3055 2/22 |
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