PIN DESCRIPTION

Pins

Name

Description

1

CSOUT

Chip-Select for output control bits DET and GDK . Active Low. (*)

2

CSIN

Chip-Select for input control bits latches D0 D1 D2 R0 R1 . Active Low. (*)

3

D0

Control Interface input bit 0. (*)

4

D1

Control Interface input bit 1. (*)

5

D2

Control Interface input bit 2. (*)

6

R0

Relay driver 0 command. Active High. (*)

7

R1

Relay driver 1 command. Active High. (*)

8

RES

Reset Input; active low.

10

Positive Power Supply (+5V).

11

CRT

Ring-Trip time constant capacitor.

12

REL1

Relay 1 driver output.

13

REL0

Relay 0 driver output.

14

RELR

Ringer Relay driver output.

15

RGND

Relay drivers ground.

16

Negative Battery Supply.

17

TX

4 wires output stage (Transmitting Port).

18

ZB

Cancelling input of Balance Network for 2 to 4 wires conversion.

19

RS

Protection resistors image. The image resistor is connected between this node and ZAC.

20

ZAC

AC impedance synthesis.

21

ZAC1

RX buffer output/ AC impedance is connected between this node and ZAC.

22

RX

4 wires input stage (Receiving Port). A 100K external resistor must be connected to AGND to

bias the input stage.

23

TTXIN

Metering Signal Input (AC) and Line Voltage Drop Programming (DC). If not used must be connectd

to AGND.

24

CAC

AC feedback input/ AC-DC split capacitor is connected between this node and ILTF.

25

RDC

DC current feedback input. The RDC resistor is connected between this node and ILTF.

26

ILTF

Transversal Line Current Image.

27

RT2

Input pin to sense ringing current , for Ring-Trip detection.

28

RT1

Input pin to sense ringing current , for Ring-Trip detection.

29

AGND

Analog ground.

30

RTH

Off-Hook threshold programming pin.

31

RLIM

Limiting current programming pin.

32

IREF

Voltage reference output to generate internal reference current.

33

CREV

Reverse polarity transition time programming.

34

CSVR

Battery supply filter capacitor.

35

BASE

Driver of the external transistor. Connected to the base.

36

VREG

Regulated voltage. Provides the negative supply to the power line drivers. It is connected to the

emitter of the external transistor.

37

BGND

Battery ground.

38

RING

B wire termination output. IB is the current sunk into this pin.

39

TIP

A wire termination output. IA is the current sourced from this pin.

40

PCD

Power Cross Detection Input

41

MODE

Interface Control Mode selection.

42

CKRING

Clock at ringing frequency for relay synch and time reference for Automatic activation

43

DET

Off-hook and Ring-Trip detection bit. Tri-State Output/Active Low.

44

GDK/ AL

Ground-Key/Alarm detection bit. Tri-State Output. Active Low.

* Input pins provided with 15

µA sink to AGND pull-down.

STLC3080

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